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參數(shù)資料
| 型號： | S25FL001D0FMAI011 |
| 廠商： | Spansion Inc. |
| 英文描述： | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| 中文描述： | 2兆位，1兆閃存的CMOS 3.0伏，25兆赫的SPI總線接口內(nèi)存 |
| 文件頁數(shù)： | 21/38頁 |
| 文件大?。?/td> | 892K |
| 代理商： | S25FL001D0FMAI011 |
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June 9, 2004 30167A+1
S25FL Family (Serial Peripheral Interface)
21
P r e l i m i n a r y I n f o r m a t i o n
Figure 12. Sector Erase (SE) Instruction Sequence
Bulk Erase (BE)
The Bulk Erase (BE) instruction sets to 1 (FFh) all bits inside the entire memory.
Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been de-
coded, the device sets the Write Enable Latch (WEL).
The Bulk Erase (BE) instruction is entered by driving Chip Select (CS#) Low, fol-
lowed by the instruction code, on Serial Data Input (SI). No address is required
for the Bulk Erase (BE) instruction. Chip Select (CS#) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in
Figure 13
.
Chip Select (CS#) must be driven High after the eighth bit of the last address byte
has been latched in, otherwise the Bulk Erase (BE) instruction is not executed.
As soon as Chip Select (CS#) is driven High, the self-timed Bulk Erase cycle
(whose duration is t
BE
) is initiated. While the Bulk Erase cycle is in progress, the
Status Register may be read to check the value of the Write In Progress (WIP)
bit. The Write In Progress (WIP) bit is 1 during the self-timed Bulk Erase cycle,
and is 0 when it is completed. At some unspecified time before the cycle is com-
pleted, the Write Enable Latch (WEL) bit is reset.
A Bulk Erase (BE) instruction is executed only if both the Block Protect (BP1, BP0)
bits (see Table
1
and Table
2
) are set to 0. The Bulk Erase (BE) instruction is ig-
nored if one or more sectors are protected.
CS#
SCK
SI
Instruction
24 Bit Address
0
1
2
3
4
5
6
7
8
9
10
28
29
30
31
23 22 21
3
2
1
0
MSB
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PDF描述 |
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| S25FL002D0FNFI003 | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL002D0FNFI011 | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL002D0FNFI013 | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMAI013 | 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMFI001 | INDUCTOR,STANDARD WOUND,0806,22UH 10% ,T&R RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S25FL001D0FMAI013 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMFI001 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMFI003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMFI011 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
| S25FL001D0FMFI013 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface |
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