- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374647 > S2102 (Applied Micro Circuits Corp.) Dual Fibre Channel Device(光纖通道雙收發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | S2102 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Dual Fibre Channel Device(光纖通道雙收發(fā)器) |
| 中文描述： | 雙光纖通道設(shè)備（光纖通道雙收發(fā)器） |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 294K |
| 代理商： | S2102 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
9
S2102
DUAL FIBRE CHANNEL DEVICE
October 6, 2000 / Revision C
JTAG TESTING
The JTAG implementation for the S2102 is compli-
ant with the IEEE1149.1 requirements. JTAG is used
to test the connectivity of the pins on the chip. The
TAP, (Test Access Port), provides access to the test
logic of the chip. When TRST is asserted the TAP is
initialized. TAP is a state machine that is controlled
by TMS. The test instruction and data are loaded
through TDI on the rising edge of TCK. When TMS is
high the test instruction is loaded into the instruction
register. When TMS is low the test data is loaded
Figure 8. S2102 Diagnostic Loopback Operation
CRU
CSU
OTHER OPERATING MODES
Operating Frequency Rate
The S2102 is designed to operate at the Fibre Chan-
nel rate of 1.062 GHz.
Loopback Mode
When loopback mode is enabled, the serial data
from the transmitter is provided to the serial input of
the receiver, as shown in Figure 8. This provides the
ability to perform system diagnostics and off-line
testing of the interface to verify the integrity of the
serial channel. Loopback mode is enabled indepen-
dently for each channel using its respective
loopback-enable input, LPEN.
Test Modes
The RESET pin is used to initialize the Transmit
FIFOs and must be asserted (LOW) prior to entering
the normal operational state (see section Transmit
FIFO Initialization).
Note: Serial output data remains active during loopback opera-
tion to enable other system tests to be performed.
into the data register. TDO changes on the falling
edge of TCK. All input pins, including clocks, that
have boundary scan are observe only. They can be
sampled in either normal operational or test mode.
All output pins that have boundary scan, are observe
and control. They can be sampled as they are driven
out of the chip in normal operational mode, and they
can be driven out of the chip in test mode using the
Extest instruction. Since JTAG testing operates only
on digital signals there are some pins with analog
signals that JTAG does not cover. The JTAG imple-
mentation has the three required instruction, Bypass,
Extest, and Sample/Preload.
Instruction
BYPASS
EXTEST
SAMPLE/PRELOAD
ID CODE
Code
11
00
01
10
JTAG Instruction Description:
The BYPASS register contains a single shift-register
stage and is used to provide a minimum-length serial
path between the TDI and TDO pins of a component
when no test operation of that component is re-
quired. This allows more rapid movement of test
data to and from other components on a board that
are required to perform test operations.
The EXTEST instruction allows testing of off-chip cir-
cuitry and board level interconnections. Data would
typically be loaded onto the latched parallel outputs
of boundary-scan shift-register stages using the
SAMPLE/PRELOAD instruction prior to selection of
the EXTEST instruction.
The SAMPLE/PRELOAD instruction allows a snap-
shot of the normal operation of the component to be
taken and examined. It also allows data values to be
loaded onto the latched parallel outputs of the
boundary-scan shift register prior to selection of the
other boundary-scan test instructions.
The following table provides a list of the pins that are
JTAG tested. Each port has a boundary scan regis-
ter (BSR), unless otherwise noted. The following fea-
tures are described: the JTAG mode of each register
(input, output2, or internal (refers to an internal pack-
age pin)), the direction of the port if it has a bound-
ary scan register (in or out), and the position of this
register on the scan chain.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S2104 | Quad Fibre Channel Device(帶鎖相環(huán)時鐘合成器的光纖通道四收發(fā)器) |
| S212S01 | SIP Type SSR for Medium Power Control |
| S212S02 | SIP Type SSR for Medium Power Control |
| S216S01 | SIP Type SSR for Medium Power Control |
| S216S02 | IT(rms)÷16A, Zero Cross type SIP 4pin Triac output SSR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-210-24 | 功能描述:線性和開關(guān)式電源 211.2W 24V 8.8A RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:Rack 長度: 寬度: 高度: |
| S210250-BLK | 制造商:SIFAM INSTRUMENTS 功能描述:KNOB 21MMX0.25IN BLACK |
| S-210-27 | 功能描述:線性和開關(guān)式電源 210.6W 27V 7.8A RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:Rack 長度: 寬度: 高度: |
| S-210-48 | 功能描述:線性和開關(guān)式電源 211.2W 48V 4.4A RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:Rack 長度: 寬度: 高度: |
| S-210-5 | 功能描述:線性和開關(guān)式電源 200W 5V 40A RoHS:否 制造商:TDK-Lambda 產(chǎn)品:Switching Supplies 開放式框架/封閉式:Enclosed 輸出功率額定值:800 W 輸入電壓:85 VAC to 265 VAC 輸出端數(shù)量:1 輸出電壓（通道 1）:20 V 輸出電流（通道 1）:40 A 商用/醫(yī)用: 輸出電壓（通道 2）: 輸出電流（通道 2）: 安裝風(fēng)格:Rack 長度: 寬度: 高度: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。