參數(shù)資料
型號(hào)： S1C63158F0A0100
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, FLASH, 4.2 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 14/21頁(yè)
文件大?。?/td> 1955K
代理商： S1C63158F0A0100
2 PINS AND PACKAGE
S1C6F016 TECHNICAL MANUAL
Seiko Epson Corporation
2-5
Pin name
Pin/pad No.
I/O OP SFT
Function
Default
Shared
function
QFP
Chip
P10
P10
75
72
I/o
–
D I/O port pin
KEY10
I
–
SFT Port interrupt input pin
EVIN_A
I
–
SFT Event counter (programmable timer 0) input pin
P11
P11
74
71
I/o
–
D I/O port pin
KEY11
I
–
SFT Port interrupt input pin
TOUT_A
O
–
SFT Programmable timer 0/1 output pin
P12
P12
73
70
I/o
–
D I/O port pin
KEY12
I
–
SFT Port interrupt input pin
BZ
O
–
SFT Sound generator output pin
P13
P13
72
69
I/o
–
D I/O port pin
KEY13
I
–
SFT Port interrupt input pin
FOUT
O
–
SFT FOUT clock output pin
P20
P20
88
85
I/o OP
– I/O port pin
SEG44
O OP
– LCD segment output pin
P21
P21
87
84
I/o OP
– I/O port pin
SEG45
O OP
– LCD segment output pin
P22
P22
86
83
I/o OP
D I/O port pin
EVIN_B
I
SFT Event counter (programmable timer 2) input pin
SEG46
O OP
– LCD segment output pin
P23
P23
85
82
I/o OP
D I/O port pin
TOUT_B
O
SFT Programmable timer 2/3 output pin
SEG47
O OP
– LCD segment output pin
P30
P30
92
89
I/o OP
D I/O port pin
SCLK
I/o
SFT Serial I/F clock input/output pin
SEG40
O OP
– LCD segment output pin
P31
P31
91
88
I/o OP
D I/O port pin
SOUT
O
SFT Serial I/F data output pin
SEG41
O OP
– LCD segment output pin
P32
P32
90
87
I/o OP
D I/O port pin
SIN
I
SFT Serial I/F data input pin
SEG42
O OP
– LCD segment output pin
P33
P33
89
86
I/o OP
D I/O port pin
SRDY_SS
i/O
SFT Serial I/F ready output/slave-select input pin
SEG43
O OP
– LCD segment output pin
P40
P40
97
94
I/o OP
– I/O port pin
SEG36
O OP
– LCD segment output pin
P41
P41
96
93
I/o OP
– I/O port pin
SEG37
O OP
– LCD segment output pin
P42
P42
95
92
I/o OP
– I/O port pin
SEG38
O OP
– LCD segment output pin
P43
P43
94
91
I/o OP
– I/O port pin
SEG39
O OP
– LCD segment output pin
I/O: Capital letters (I, O) represent the input/output direction in the initial settings.
OP: Selected by mask option ("–" means "no option provided.")
SFT: Switched by software ("–" means "no software switch provided" and "D" means default function.)
Note: The test terminals must be connected to the power supply or left open as shown below. Be sure to
avoid applying other conditions to the terminals during normal operation.
TEST: Connect to VSS.
TEST1: Leave open.
TEST2: Connect to VDD.
TEST3: Leave open.
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PDF描述
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