參數(shù)資料
型號: S1C60L13D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, UUC79
封裝: DIE-79
文件頁數(shù): 13/104頁
文件大?。?/td> 850K
代理商: S1C60L13D
8
EPSON
S1C60N13 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
CHAPTER
2POWER SUPPLY AND INITIAL RESET
2.1 Power Supply
With a single external power supply (
1) supplied to VDD through VSS, the S1C60N13 Series generates the
necessary internal voltage with the voltage regurator circuit (<VD1> for oscillators, <VC1> for LCD) and
the voltage booster circuit (<VC2 and VC3> for LCD).
1 Supply voltage: S1C60N13/60A13 .. 3 V, S1C60L13 .. 1.5 V
Figure 2.1.1 shows the power supply configuration.
The voltage <VD1> for the internal circuit that is generated by the internal system voltage regulator is
1.3 V.
The S1C60N13 Series generates <VC1> with the voltage regulator and <VC2, VC3> with the voltage
booster.
Notes: External loads cannot be driven by the output voltage of the voltage regulator and voltage
booster.
See Chapter 7, "Electrical Characteristics", for voltage values.
Internal system
voltage regurator
LCD system
voltage regurator
LCD system
voltage booster
Oscillation
circuit
Internal
circuit
LCD
driver
VDD
VD1
VC1
VC2
VC3
CA
CB
VSS
External
power
supply
VD1
VC1
VC2
VC3
OSC1, 2
OSC3, 4 (S1C60A13)
COM0–3
SEG0–37
Fig. 2.1.1 Power supply configuration
The LCD system voltage regulator can be disabled by mask option. In this case, external elements can be
minimized because the external capacitors for the LCD system voltage regulator are not necessary.
However when the LCD system voltage regulator is not used, the display quality of the LCD panel, when
the supply voltage fluctuates (drops), is inferior to when the LCD system voltage regulator is used.
Figure 2.1.2 shows the external element configuration when the LCD system voltage regulator is not
used.
VDD
VD1
VC1
VC2
VC3
CA
CB
VSS
3.0 V
3 V LCD panel
1/4, 1/3 or 1/2 duty, 1/3 bias
Note: VC3 is shorded to VDD inside the IC
VDD
VD1
VC1
VC2
VC3
CA
CB
VSS
3.0 V
3 V LCD panel
1/4, 1/3 or 1/2 duty, 1/2 bias
VDD
VD1
VC1
VC2
VC3
CA
CB
VSS
1.5 V
3 V LCD panel
1/4, 1/3 or 1/2 duty, 1/2 bias
Note: VC1 is shorded to VDD inside the IC
Fig. 2.1.2 External elements when LCD system voltage regulator is not used
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