參數(shù)資料
型號: S-29291A
廠商: Seiko Instruments Inc.
英文描述: 128-Word x 16-Bit CMOS Serial EEPROM(2K位CMOS串行EEPROM)
中文描述: 128字× 16位的CMOS串行EEPROM(2K位的CMOS串行EEPROM的)
文件頁數(shù): 9/44頁
文件大?。?/td> 213K
代理商: S-29291A
CMOS SERIAL E
2
PROM
S-29X91A Series
8
Seiko Instruments Inc.
2.2 Write all (WRAL)
This instruction writes the same 16-bit data into every address.
After changing CS to high, input a start-bit, op-code (WRAL), address(optional), and 16-bit data. If there is a data
overflow of more than 16 bits, the write data is shifted for every clock in succession and only the last 16-bit data is
valid. Changing CS to low starts the WRAL operation. It is not necessary to make the data "1" before initiating
the WRAL operation.
2.3 Erase all (ERAL)
This instruction erases the data in every address. All data changes to "1."
After changing CS to high, input a start-bit, op-code (ERAL), and address (optional). It is not necessary to input
data. Changing CS to low starts the ERAL operation.
3.
Write enable (PEN) and Write disable (PDS)
The PEN instruction puts the S-29X94A Series into write enable mode, which accepts PROGRAM, WRAL, and
ERAL instruction. The PDS instruction puts the S-29X94A Series into write disable mode, which refuses
PROGRAM, WRAL, and ERAL instruction.
The S-29X94A Series powers on in write disable mode, which protects data against unexpected, erroneous write
operations caused by noise and/or CPU malfunctions. It should be kept in write disable mode except when
performing write operations.
Figure 7 WRAL Timing
Figure 8 ERAL Timing
Figure 9 PEN/PDS Timing
11=PEN
00=PDS
0
0
X
1
2
3
4
5
6
7
8
DI
CS
SK
X
X
16
X
Hi-Z
17
16
t
PR
1
t
SV
15
14
D15
0
0
8
7
6
5
4
3
2
1
SK
DI
DO
0
D0
Hi-Z
t
HZ1
ready
busy
9
32
X
X
X
X
X
X
X
t
CDS
VERIFY
CS
Standby
Hi-Z
16
t
PR
1
t
SV
15
14
X
0
0
8
7
6
5
4
3
2
1
SK
DI
DO
0
X
Hi-Z
t
HZ1
ready
busy
9
X
X
X
X
X
t
CDS
CS
VERIFY
Standby
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