參數(shù)資料
型號(hào)： S-24C016A
廠商： Seiko Instruments Inc.
英文描述： 16Kbits CMOS 2-Wired Serial EEPROM(16K位CMOS 2線串行EEPROM)
中文描述： 16Kbits的CMOS 2 -有線串行EEPROM（16K的位的CMOS 2線串行EEPROM的）
文件頁(yè)數(shù)： 12/53頁(yè)
文件大?。?/td> 220K
代理商： S-24C016A
CMOS 2-WIRED SERIAL EEPROM
S-24C08A/16A Series
Seiko Instruments Inc.
11
7.
Read
7.1
Current Address Read
The EEPROM is capable of storing the last accessed memory address during both writing and
reading. The memory address is stored as long as the power voltage is more than the retention
voltage V
AH
.
Accordingly, when the master device recognizes the position of the address pointer inside the
EEPROM, data can be read from the memory address of the current address pointer without
assigning a word address. This is called"Current Address Read"
"Current Address Rea" is explained for when the address counter inside the EEPROM is an "n"
address.
When the EEPROM receives a 7-bit length device address and a 1-bit read/write instruction code
"1," following the start condition signal, it outputs the acknowledgment signal. However, in the S-
24C08A/16A, page address (P1, P0)/(P2, P1, P0) becomes invalid, and the memory address of
the current address pointer becomes valid.
Next, 8-bit length data at an "n" address is output from the EEPROM, in synchronization with the
SCL clock.
The address counter is incremented at the falling edge of the SCL clock by which the 8th bit of
data is output, and the address counter goes to address n+1.
The master device does not output the acknowledgment signal and transmits the stop condition
signal to finish reading
.
For recognition of the address pointer inside the EEPROM, take into consideration the following:
The memory address counter inside the EEPROM is automatically incremented for every falling
edge of the SCL clock by which the 8th bit of data is output during the time of reading. During the
time of writing, upper bits of the memory address (upper 4 bits of the word address and page
address) are left unchanged and are not incremented.
Figure 12
Current Address Read
S
T
A
R
T
1 0
1
0
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
ADR INC
P2 P1 P0
D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
L
S
B
1
DATA
NO ACK from
Master Device
(P2 is A2 in the S-24C08A)
相關(guān)PDF資料
PDF描述
S-24C01A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-1A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-S The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-TB11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S24C01A 制造商:SII 制造商全稱(chēng):Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01A 制造商:SII 制造商全稱(chēng):Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01ADP 制造商:SII 制造商全稱(chēng):Seiko Instruments Inc 功能描述:CMOS 2-WIRED SERIAL EEPROM
S-24C01ADP-11 制造商:SII 制造商全稱(chēng):Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01ADP-11-1A 制造商:SII 制造商全稱(chēng):Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
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