參數(shù)資料
型號: RTL8201CP-VD
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
中文描述: SINGLE-CHIP/SINGLE-PORT個10/100M快速以太網(wǎng)PHYCEIVER(自動交叉)
文件頁數(shù): 30/38頁
文件大小: 512K
代理商: RTL8201CP-VD
RTL8201CP
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
25
Track ID: JATR-1076-21 Rev. 1.21
TXCLK
TXEN
TXD[0:3]
CRS
TPTX+-
t
6
t
8
t
t
9
7
Figure 7. MII Transmission Cycle Timing-2
8.2.2. MII Reception Cycle Timing
Table 34. MII Reception Cycle Timing
Symbol
t
1
Description
RXCLK high pulse width
Minimum
14
140
14
140
10
6
10
Typical
20
200
20
200
40
400
Maximum
26
260
26
260
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
t
2
RXCLK low pulse width
t
3
RXCLK period
t
4
RXER, RXDV, RXD[0:3] setup to
RXCLK rising edge
t
5
RXER, RXDV, RXD[0:3] hold
after RXCLK rising edge
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
6
ns
ns
ns
ns
ns
ns
130
600
240
600
150
t
6
Receive frame to CRS high
t
7
End of receive frame to CRS low
t
8
Receive frame to sampled edge of
RXDV
10Mbps
100Mbps
10Mbps
3200
120
800
ns
ns
ns
t
9
End of receive frame to sampled
edge of RXDV
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