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參數(shù)資料
| 型號： | RTC72423A |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大小： | 71K |
| 代理商： | RTC72423A |
66
Real time clock module
CS
1
V
IH
t
SU
(CS1)
t
SU
(A-ALE)
t
H
(ALE-A)
V
IH
V
IL
V
IH
V
IH
V
IH
V
IH
V
IL
V
IH
V
IH
V
IL
V
IH
V
IL
V
IL
V
IL
V
IH
(CS1)
t
SU
(ALE-W)
t
SU
(D-W)
t
SU
(W-ALE)
t
SU
(R-ALE)
t
H (W-D)
t
W
(ALE)
CS
0
ALE
WR
A
0
to A
3
D
0
to D
3
t
H
(CS1)
t
W
(W)
CS
1
CS
1
CS
0
or WR not occurred
CS
1
V
IH
(CS1)
t
SU
t
SU
(A-ALE)
t
H
(ALE-A)
1/5V
DD
V
DD
4V
4V
V
IH
2
V
IH
2
V
IL
2
V
IL
2
t
CDR
t
R
V
IH
V
IL
V
IH
V
OH
V
OL
V
OH
V
OL
V
IH
V
IH
V
IH
V
IL
t
SU
(ALE-R)
V
IH
V
IL
V
IL
V
IL
V
IL
V
IH
(CS1)
t
PZV
(R-Q)
t
PVZ
(R-Q)
t
SU
(R-ALE)
t
rnc
(R)
t
W
(ALE)
CS
0
ALE
RD
A
0
to A
3
D
0
to D
3
t
H
(CS1)
2 to 4V
≤
Data storage mode
Interface possible
with external
terminals
Interface possible
with the external
terminals
OSC
DIVIDER
READ WRITE
CONTROL
ADDRESS LATCH
DATA BUS BUFFER
ADDRESS DECODER
RD WR CS
1
ALE
CS
0
A
0
D
0
D
1
D
2
D
3
A
1
A
2
A
3
STDP
64 H
Z
CARRY PER
CARRY PER
CARRY PER
IRQFLAG
R
S
3
B
H
4
4
4
4
4
24/12
Seconds
Minutes
Hours
Days
Months
Years
W
Sec 1
Sec 10 Min 1 Min 10 Hou 1 Hou 10 Day 1 Day 10 Mon 1 Mon 10 Yea 1 Yea 10
Reg D
Reg E
Reg F
Register table
Switching characteristics (with ALE)
(Please connect ALE to V
DD
if the microprocessor does not have an ALE output.)
Item
CS
1
setup time
Address setup time before ALE
Address hold time after ALE
ALE pulse width
ALE setup time before WRITE
ALE setup time before READ
ALE setup time after WRITE
ALE setup time after READ
WRITE pulse width
DATA delay time after READ
DATA Hold time after READ
DATA setup time before WRITE
DATA hold time after WRITE
CS
1
hold time
READ/WRITE recovery time
t
REC (R/W)
Read mode (with ALE)
Write mode (with ALE)
Data holding timing
Block diagram
(V
DD
= 5V
±
0.5V)
0=“L” level,1=“H” level, REST = RESET ITRPT/STND=INTERRUPT/STANDARD
1) Bit does not exist.
2) Please mask AM/PM bit with 10's of hours operations.
3) Busy is read only. IRQ can only. IRQ can only be set low (“O”).
4)
Data Bit
1
0
AM
STND
5) TEST bit should be “O”.
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
A
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S
1
S
10
MI
1
MI
10
H
1
H
10
D
1
D
10
MO
1
MO
10
Y
1
Y
10
W
Reg
D
Reg
E
Reg
F
D
3
s
8
mi
8
h
8
d
8
mo
8
y
8
y
80
30 sec.
ADJ
t
1
TEST
D
2
s
4
s
40
mi
4
mi
40
h
4
PM/AM
d
4
mo
4
y
4
y
40
w
4
IRQ
FLAG
t
0
24/12
D
1
s
2
s
20
mi
2
mi
20
h
2
h
20
d
2
d
20
mo
2
y
2
y
20
w
2
BUSY
ITRPT
/STND
STOP
D
0
s
1
s
10
mi
1
mi
10
h
1
h
10
d
1
d
10
mo
1
mo
10
y
1
y
10
w
1
HOLD
MASK
REST
Count
Value
0 to 9
0 to 5
0 to 9
0 to 5
0 to 9
0 or
0 to 1
0 to 9
0 to 3
0 to 9
0 to 1
0 to 9
0 to 6
-----
Remarks
1- second digit register
10- second digit register
1- minute digit register
10- minute digit register
1- hour digit register
PM/AM,10- hours digit register
1- day digit register
10 -day digit register
1- month digit register
10- month digit register
1- year digit register
10- year digit register
Week register
Control Register D
Control Register E
Control Register F
Symbol
t
SU (CS1)
t
SU (A-ALE)
t
H (ALE-A)
t
W (ALE)
t
SU (ALE-W)
t
SU (ALE-R)
t
SU (W-ALE)
t
SU (R-ALE)
t
W (W)
t
PZV (R-Q)
t
PVZ (R-Q)
t
SU (D-W)
t
H (W-D)
t
H (CS1)
Condition
C
L
=150pF
Min.
1000
50
50
80
0
0
50
50
120
----
0
80
10
1000
200
Max.
----
120
70
----
Unit
ns
A
R
PM/AM
PM
ITRPT/STND
ITRPT
24/12
24
12
Data
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相關(guān)代理商/技術(shù)參數(shù) |
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| RTC-72423A | 功能描述:IC REAL TIME CLOCK 24-SOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 實(shí)時(shí)時(shí)鐘 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/日歷 特點(diǎn):警報(bào)器，閏年，SRAM 存儲容量:- 時(shí)間格式:HH:MM:SS（12/24 小時(shí)） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
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