參數(shù)資料
型號: RT9201
廠商: Richtek Technology Corporation
元件分類: DC/DC變換器
英文描述: High Efficiency PWM Step-Down DC-DC Converter
中文描述: 高效PWM降壓型DC - DC轉(zhuǎn)換器
文件頁數(shù): 12/13頁
文件大小: 206K
代理商: RT9201
RT9201
12
DS9201-12 August 2007
www.richtek.com
Figure 3. RT9201 Layout Diagram
Output Capacitor Selection
The capacitor's ESR determines the output ripple voltage
and the initial voltage drop following a high slew-rate
transient's edge. Typically, if the ESR requirement is
satisfied, the capacitance is adequate to filtering. The
output ripple voltage can be calculated as :
)
f
C
8
1
(ESR
Δ
I
Δ
V
OSC
OUT
C
OUT
×
×
+
=
The ceramic capacitor with low ESR value provides the
low output ripple and low size profile. Connect a 22
μ
F
ceramic capacitor at output terminal for good performance
and place the input and output capacitors as close as
possible to the device.
Figure 4. Top Layer
Figure 5. Bottom Layer
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT9201.
1.For the main current paths as indicated in bold lines in
Figure 3, keep their traces short and wide.
2.Put the input capacitor as close as possible to the
device pins (PVDD and PGND).
3.LX node is with high frequency voltage swing and
should be kept small area. Keep analog components
away from LX node to prevent stray capacitive noise
pick-up.
4.Connect feedback network behind the output
capacitors. Keep the loop area small. Place the
feedback components near the RT9201.
5.Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
6. An example of 2-layer PCB layout is shown in
Figure 4 to Figure 6 for reference.
Figure 6. Silkscreen Layer
EN
SS
FB
GND
VDD
PVDD
LX
PGND
RT9201
1
9
8
7
6
2
5
3
C9
V
DD
V
OUT
4
10NC
NC
C4
L1
C6
C7
R2
R1
C1
C2
R3
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