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Preliminary
2-29
RF2721
Rev A2 010509
7
Q
D
Pin
1
Function
IF IN+
Description
Balanced IF input. An input level of 400mV
PP
gives full output swing; a
level of maximum 250mV
PP
is recommended for linear operation. This
pin has no internal DC block, and an external capacitor of 100nF is
needed if connected to a DC path.
Interface Schematic
2
GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
Base of the LO transistor. This pin is not connected to anything else.
This transistor can be used for an oscillator. The collector of the transis-
tor is connected to V
CC
.
3
OSC B
4
5
6
OSC E
GND
LO2-
Emitter of the LO transistor. This pin is not connected to anything else.
See pin 3.
Same as pin 2.
Balanced input for the doubled LO. An internal divide-by-2 network
generates the actual LO for the mixers. The divided signal is not acces-
sible. When the LO is driven single ended this pin should be connected
to a 100nF capacitor to ground. This pin has an internal pull-up resistor
to V
CC
and an external DC blocking capacitor of 100nF is recom-
mended.
7
LO2+
Balanced input for the doubled LO. The input frequency should be
twice (2x) the IF frequency. An internal divide-by-2 network generates
the actual LO for the mixers. This pin has an internal pull-up resistor to
V
CC
, and an external DC blocking capacitor of 100nF is recommended.
LO frequencies below 100kHz are acceptable, providing that the LO
signal is square wave. Above 100kHz a sine wave signal is acceptable.
The quadrature accuracy of the LO/2 frequency into the mixers is
affected by the duty cycle of the LO input signal. Square wave signals
with other than 50% duty cycle will degrade the quadrature accuracy of
the LO signal, thereby adversely affecting the I and Q quadrature accu-
racy. Since the LO input is AC coupled, asymmetric sine waves and
sine waves clipped on either the top or bottom half will not have 50%
duty cycles relative to the internal DC reference point. For this reason,
distorted LO sine wave signals will degrade performance in a fashion
similar to non-50% duty cycle square waves. A sine wave input with
even harmonics less than -15dBc is recommended. The internal limit-
ing buffer amplifier ensures the amplitude stability of the demodulator.
Demodulated baseband Q output. The reference DC level of this pin is
set by the voltage of pin 9 (REF IN), which is connected to this pin
through a 5k
resistor to the collectors of this push-pull output. This
results in an output impedance of 5k
if the REF IN pin is connected to
a low impedance source. The capacitance of the load determines the
maximum baseband frequency. A very low capacitive load may stretch
the 3dB bandwidth over 10MHz. Another way to increase bandwidth is
by connecting a shunt resistor. This will trade-off gain for bandwidth.
Reference voltage input for the baseband outputs. This pin can be con-
nected to the reference voltage source of the Analog to Digital Con-
verter. It is connected to the I and Q outputs through 5k
resistors.
This pin should have an external decoupling capacitor large enough to
decouple the lowest baseband frequency.
See pin 6.
8
Q OUT
9
REF IN
See pin 8.
IF IN-
1500
IF IN+
1500
350
350
VCC
OSC B
OSC E
200
200
LO2+
LO2-
5 k
REF IN
I/Q OUT