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參數(shù)資料
| 型號(hào)： | RD151TS3314ARPH0 |
| 元件分類(lèi)： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 80 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 3.95 X 4.90 MM, 1.27 MM PITCH, PLASTIC, SOP-8 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大小： | 94K |
| 代理商： | RD151TS3314ARPH0 |
RD151TS3314ARP, RD151TS3324ARP
Rev.1.00 May 11, 2006 page 5 of 8
Application Information
1. Recommended Circuit Configuration
The power supply circuit of the optimal performance on the application of a system should refer to Figure 2.
VDD decoupling is important to both reduce Jitter and EMI radiation.
The C1 decoupling capacitor should be placed as close to the VDD pin as possible, otherwise the increased trace
inductance will negate its decoupling capability.
8
1
7
SSCOUT
6
SEL
SSN
5
2
3
4
XIN
XOUT
R1
C1
C2
GND GND
GND
VDD
(Crystal or Reference input)
(Crystal or Not connection)
NC
Notes:
C1 = High frequency supply decoupling capacitor.
(0.1
F recommended)
C2 = Low frequency supply decoupling capacitor.
(22
F recommended)
R1 = Match value to line impedance.
Figure 2 Recommended circuit configuration
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