
PRODUCT SPECIFICATION
RC7144
9
P
2
1
0
21, 20, 18, 17
32, 31, 29, 28
38, 37, 35, 34
SDRAM8:11
SDRAM4:7
SDRAM0:3
Clock Output Disabled
Clock Output Disabled
Clock Output Disabled
Low
Low
Low
Active
Active
Active
1
1
1
Data Byte 4
7
6
5
4
3
2
1
0
Data Byte 5
7
6
5
4
3
2
1
0
Data Byte 6
7
6
5
4
3
2
1
0
Data Byte 7
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
-
-
-
-
-
-
Reserved
Reserved
Reserved
Clock Output Disabled
Reserved
Reserved
Clock Output Disabled
Clock Output Disabled
-
-
-
-
-
-
0
0
0
1
0
0
1
1
47
-
-
46
2
IOAPIC
-
-
REF1
REF0
Low
-
-
Low
Low
Active
-
-
Active
Active
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
0
0
0
Table 3. Data Bytes 0–7 Serial Configuration Map
(Continued)
Bit(s)
Affected Pin
Pin No.
Control Function
Bit Control
Default
Pin Name
0
1