
R3132x/R3133x
17
Operation of R3133x Series
OUT
VDD
GND
Vref
+
-
Nch
Rb
Ra
Pch
Comparator
Delay
Circuit
Block Diagram
CMOS Output Type:
Out pin is connected to the drain of Nch Tr. and Pch Tr. in this IC.
Nch Open Drain Output Type: I
Out pin is connected to the drain of Nch Tr. in this IC.
(OUT pin should be pulled up to VDD or an external voltage level.)
GND
A
B
1
GND
tDELAY
Detector Threshold (VDET)
=Released Voltage
Supply
Voltage
(VDD)
Output
Voltage
(VOUT)
Minimum Operating Voltage
(VDDL)
2
3
4
5
Operation Diagram
In the above diagram,
1 Output voltage becomes equal to GND level.
2 When the supply voltage is down to the detector threshold level (Point A), Vref >
= VDD × Rb / (Ra+Rb) is true.
Then, the output of the comparator is reversed, thus output voltage becomes equal to the supply voltage (Nch
open drain output type; equal to pull-up voltage).
3 When the supply voltage is lower than minimum operating voltage, the output of transistor is indefinite,
therefore the output is also indefinite. (Nch open drain output type; the output voltage level is equal to pull-up
voltage.)
4 Output voltage is equal to the supply voltage. (Nch open drain output type; equal to pull-up Voltage.)
5 When the supply voltage is higher than the released voltage (Point B), Vref <
= VDD × Rb / (Ra+Rb) is true. Then
the output of the comparator is reversed, thus the output voltage becomes equal to GND level after the output
delay time.
There is no hysteresis range between the detector threshold and the released voltage.