SLTS289F
– AUGUST 2007 – REVISED APRIL 2011
ELECTRICAL CHARACTERISTICS
at 25
°C free-air temperature, VI = 12 V, VO = 3.3 V, IO = IO(Max), CI = 100 F, CO = 100 F (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IO
Output current
TA = 85°C, 100LFM airflow
0
6
A
0.6 V
≤ VO ≤ 3.6
4.5
14 (1)
VI
Input voltage range
Over IO range
V
3.6 V
< VO ≤ 5.5
VO /0.83
(2)
14
VO(adj)
Output voltage adjust range
Over IO range
0.6
5.5
V
Set-point voltage tolerance
TA = 25°C
±2 (3)
% VO
Temperature variation
-40
°C ≤ TA ≤ +85°C
±0.2
% VO
VO
Line regulation
Over VI range
±0.3
% VO
Load regulation
Over IO range
±0.5
% VO
Total output voltage variation
Includes set-point, line, load,
–40°C ≤ TA ≤ +85°C
±3 (3)
% VO
RSET = 267 , VI = 12 V, VO = 5 V
(2)
92 %
RSET = 432 , VO = 3.3 V
(2)
95 %
RSET = 619 , VO = 2.5 V
93 %
TA = 25°C
RSET = 976 , VO = 1.8 V
91 %
η
Efficiency
VI = 5 V
RSET = 1.3 k, VO = 1.5 V
90 %
IO = 5 A
RSET = 1.91 k, VO = 1.2 V
88 %
RSET = 2.87 k, VO = 1 V
86 %
RSET = 10.7 k, VO = 0.7 V
84 %
Output voltage ripple
20 MHz bandwith
50
mVPP
ILIM
Overcurrent threshold
Reset, followed by autorecovery
10
A
Recovery time
50
s
Transient response
2.5 A/
s load step from 50 to 100% IOmax
VO
150
mV
over/undershoot
VI = increasing
4.25
4.4
UVLO
Undervoltage lockout
V
VI = decreasing
3.8
3.95
Input high voltage (VIH)
2.8
6 (4)
V
Inhibit control (pin 1)
Input low voltage (VIL)
–0.3
0.6
Input low current (IIL)
–125
A
II(stby)
Input standby current
Pin 1 to GND
1
mA
FS
Switching frequency
Over VI and IO ranges
300
kHz
CI
External input capacitance
100 (5)
F
Non-ceramic
100 (6)
3000 (7)
F
CO
External output capacitance
Ceramic
22 (6)
100
Equivalent series resistance (non-ceramic)
5 (8)
m
Per Bellcore TR-332, 50% stress,
MTBF
Calculated reliability
13.7
106 Hrs
TA = 40°C, ground benign
(1)
For output voltages less than 1.0 V, the output ripple may increase (up to 2
×) when operating at input voltages greater than (VO ×15).
(2)
The minimum input voltage is 4.5 V or (VO/0.83) V, whichever is greater.
(3)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/
°C or better temperature stability.
(4)
This control pin has an internal pullup to the input voltage VI. If it is left open circuit, the module operates when input power is applied. A
small low-leakage (
<100 nA) MOSFET is recommended for control. Do not tie the inhibit pin to VI or to another module's inhibit pin. See
the application section for further guidance.
(5)
An external 100-
F bulk capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the
module.
(6)
An external 100-
F non-ceramic capacitor is required across the output (VO and GND) for proper operation. Locate the capacitor close
to the module. Adding additional capacitance close to the load improves the response of the regulator to load transients.
(7)
This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application
information for further guidance.
(8)
This is the typical ESR for all the non-ceramic capacitance. Use 7 m
as the minimum when calculating the total equivalent series
resistance (ESR) using the max-ESR values specified by the capacitor manufacturer.
Copyright
2007–2011, Texas Instruments Incorporated
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