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Application Notes
Using the Inhibit Function on the PT6340
12V Bus Excalibur Series Converters
The PT6340 series are high efficiency regulators that
are designed to operate off a 12V input bus. These devices
incorporate an inhibit function, which may be used in
applications that require a power-up/shutdown feature.
The inhibit function is provided by the Inhibit* control,
pin 1. If pin 1 is left open-circuit the regulator operates
normally, and provides a regulated output whenever a valid
supply voltage is applied to Vin (pins 2– 4) with respect
to GND (pins 5–8). If a low voltage 2 is then applied to
pin 1 the regulator output will be disabled and the input
current drawn by the ISR will typically drop to 0.5mA 4.
The standby control may also be used to hold-off the
regulator output during the period that input power is
applied.
The Inhibit* input can be controlled with an open-collector
(or open-drain) discrete transistor (See Figure 1). The
input is internally pulled-up to the input voltage, Vin 1.
Table 1 gives the control voltage requirements.
Table 1 Inhibit Control Requirements 3
Parameter
Min
Typ
Max
VIL
-0.1V
0.6V
VIH
2.0V
Vin
IIL
0.5mA
Notes:
1. The inhibit control input requires no external pull-up
resistor. The open-circuit voltage of the Inhibit* input is
typically the input voltage, Vin.
2. The inhibit control input is Not compatible with TTL
devices. An open-collector device, preferably a discrete
bipolar transistor (or MOSFET) is recommended. To
ensure the regulator output is disabled, the control pin
must be pulled to less than 0.6Vdc with a low-level
0.5mA sink to ground.
3. An external source voltage can be used to control the
Inhibit* pin. To guarantee the inhibit and enable status
of the regulator, the source must be capable of meeting
the voltage requirements in Table 1 .
4. When the regulator output is disabled the current drawn
from the input source is typically reduced to 0.5mA.
Figure 1
Turn-On Time:
In the circuit of Figure 1, turning Q1 on
applies a low voltage to the Inhibit* control (pin 1) and
disables the regulator ouput. Correspondingly, turning
Q1 off removes the low-voltage signal and enables the
output. Once enabled, the output will typically experience
a 10–15ms delay followed by a predictable ramp-up of
voltage. The regulator should provide a fully regulated
output voltage within 30ms. The waveform of Figure 2
shows the output voltage response of a PT6342 (3.3V)
following the turn-off of Q1. The turn off of Q1 corre-
sponds to the rise in Vinh. The waveforms were measured
with a 12Vdc input voltage, and 2 Adc load.
Figure 2
C
in
+
C
out
+
Inhibit
+12V
+3.3V
COM
Q1
BSS138
PT6342
2,3,4
5–8
1 2
9,10,11
Vin
V o
V o(adj)
GND
1
Inhibit*
PT6340 Series
Vo (2V/Div)
Iin (0.5A/Div)
Vinh (10V/Div)
HORIZ SCALE: 5ms/Div