參數(shù)資料
型號: PSD934F2-70J
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁數(shù): 39/94頁
文件大小: 476K
代理商: PSD934F2-70J
Preliminary Information
PSD9XX Family
35
The
PSD9XX
Functional
Blocks
(cont.)
9.3 Microcontroller Bus Interface
The
no-glue logic
PSD9XX Microcontroller Bus Interface can be directly connected to
most popular microcontrollers and their control signals. Key 8-bit microcontrollers with their
bus types and control signals are shown in Table 17. The interface type is specified using
the PSDsoft.
Data
Bus
Width
MCU
CNTL0
CNTL1
CNTL2
PC7
*
*
*
*
*
*
*
DBE
*
*
*
*
PD0**
ADIO0
PA3-PA0 PA7-PA4
*
A3-A0
*
*
*
*
*
*
D3-D0
*
*
D3-D0
8031/8051
80C51XA
80C251
80C251
80198
68HC11
68HC05C0
68HC912
Z80
Z8
68330
M37702M2
8
8
8
8
8
8
8
8
8
8
8
8
WR
WR
WR
WR
WR
R/W
WR
R/W
WR
R/W
R/W
R/W
RD
RD
PSEN
RD
RD
E
RD
E
RD
DS
DS
E
PSEN
PSEN
*
PSEN
*
*
*
*
*
*
*
*
ALE
ALE
ALE
ALE
ALE
AS
AS
AS
*
AS
AS
ALE
A0
A4
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
*
*
*
*
*
*
*
*
D7-D4
*
*
D7-D4
Table 17. Microcontrollers and their Control Signals
*
*
Unused CNTL2 pin can be configured as PLD input. Other unused pins (PC7, PD0, PA3-0) can be
**
configured for other I/O functions.
**
ALE/AS input is optional for microcontrollers with a non-multiplexed bus
9.3.1. PSD9XX Interface to a Multiplexed 8-Bit Bus
Figure 12 shows an example of a system using a microcontroller with an 8-bit multiplexed
bus and a PSD9XX. The ADIO port on the PSD9XX is connected directly to the
microcontroller address/data bus. ALE latches the address lines internally. Latched
addresses can be brought out to Port A or B. The PSD9XX drives the ADIO data bus only
when one of its internal resources is accessed and the RD input is active. Should the
system address bus exceed sixteen bits, Ports A, B, C, or D may be used as additional
address inputs.
9.3.2. PSD9XX Interface to a Non-Multiplexed 8-Bit Bus
Figure 13 shows an example of a system using a microcontroller with an 8-bit
non-multiplexed bus and a PSD9XX. The address bus is connected to the ADIO Port, and
the data bus is connected to Port A. Port A is in tri-state mode when the PSD9XX is not
accessed by the microcontroller. Should the system address bus exceed sixteen bits, Ports
B, C, or D may be used for additional address inputs.
相關(guān)PDF資料
PDF描述
PSD934F2-70M Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90J Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90JI Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90M Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD934F2-90MI Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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