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    • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄368232 > PSD835G2 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA Tabless package; Similar to IRHMJ57160 with optional Total Dose Rating of 1000kRads PDF資料下載
    參數(shù)資料
    型號: PSD835G2
    英文描述: 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA Tabless package; Similar to IRHMJ57160 with optional Total Dose Rating of 1000kRads
    中文描述: 可配置的存儲系統(tǒng)級芯片的8位微控制器
    文件頁數(shù): 18/110頁
    文件大小: 570K
    代理商: PSD835G2
    第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
    PSD835G2
    PSD8XX Family
    17
    9.1.1.2 Upper and Lower Block IN MAIN FLASH SECTOR
    The PSD835G2’s main Flash has eight 64K bytes sector. The 64K byte sector size may
    cause some difficulty in code mapping for an 8-bit MCU with only 64K byte address space.
    To resolve this mapping issue, the PSD835G2 provides additional logic (Figure 3) for the
    user to split the 8 sectors such that each sector has a lower and upper 32K byte block, and
    the two blocks can reside in different pages but in the same address range.
    If your design works with 64KB sectors, you don’t need to configure this logic. If the design
    requires 32KB blocks in each sector, you need to define a “FA15” PLD equation in
    PSDsoft as the A15 address input to the main Flash module. FA15 consists of 3 product
    terms and will control whether the MCU is accessing the lower or upper 32KB in the
    selected sector. Below is an example for Flash sector chip select FS0. A typical equation
    is FA15 = pgr4 of the Page Register. When pgr4 is 0 (page 00), the lower 32KB is
    selected. When pgr4 is switched to 1 by the user, the upper 32KB is selected. PSDsoft will
    automatically generate the PLD equations shown, based on your point and click
    selections.
    page = [pgr7...pgr0]; “Page Register output
    “Sector Chip Select Equation
    FS0 = ((0000h <= address <= 7FFFh) & page = 00h) #
    ((0000h <= address <= 7FFFh) & page = 10h);
    FA15 = pgr4;
    “as address A15 input to the main Flash
    “select first 32KB block
    “select second 32KB block
    If no FA15 equation is defined in PSDsoft, the A15 that comes from the MCU address bus
    will be routed as input to the main Flash instead of FA15. The FA15 equation has no
    impact in the Sector Erase operation. Note: FA15 affects all eight sectors of the main Flash
    simultaneously, you cannot direct FA15 to a particular Flash sector only.
    9.1.1.3 The Ready/Busy Pin (PE4)
    Pin PE4 can be used to output the Ready/Busy status of the PSD835G2. The output on
    the pin will be a ‘0’ (Busy) when Flash memory blocks are being written to,
    or
    when the
    Flash memory block is being erased. The output will be a ‘1’ (Ready) when no write or
    erase operation is in progress.
    The
    PSD835G2
    Functional
    Blocks
    (cont.)
    DPLD
    ARRAY
    FA15
    A15
    *
    Set by PSDsoft
    FLASH CHIP SELECTS FS0-7
    MUX
    NVM CONTROL BIT
    *
    MAIN
    FLASH
    SECTOR
    ADDR A15
    A [14:0]
    Figure 3. Selecting the Upper or Lower Block in a Main Flash Sector
    相關(guān)PDF資料
    PDF描述
    PSD835G2V 150V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package. Also available with 300 kRads Total Dose Rating.; Similar to IRHNA67164 with optional Total Dose Rating of 300 kRads.
    PSD835G2-B-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD835F2-B-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD835G2-C-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD835F2-C-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    PSD835G2-70U 功能描述:靜態(tài)隨機(jī)存取存儲器 5.0V 4M 70ns RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
    PSD835G2-90U 功能描述:靜態(tài)隨機(jī)存取存儲器 5.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
    PSD835G2-90UI 功能描述:靜態(tài)隨機(jī)存取存儲器 5.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
    PSD835G2V-12UI 功能描述:靜態(tài)隨機(jī)存取存儲器 3.0V 4M 120ns RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
    PSD835G2V-90U 功能描述:靜態(tài)隨機(jī)存取存儲器 3.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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