參數(shù)資料
型號： PPC5604BCLL48
廠商： Freescale Semiconductor
文件頁數(shù)： 32/109頁
文件大?。?/td> 0K
描述： MCU 32BIT 512K 48MHZ
標準包裝： 90
系列： MPC56xx Qorivva
核心處理器： e200z0h
芯體尺寸： 32-位
速度： 48MHz
連通性： CAN，I²C，LIN，SCI，SPI
外圍設備： POR，PWM，WDT
輸入/輸出數(shù)： 79
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 28x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤
Package pinouts and signal descriptions
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Freescale Semiconductor
29
3.7
Nexus 2+ pins
In the 208 MAPBGA package, eight additional debug pins are available (see Table 6).
3.8
Electrical characteristics
3.9
Introduction
This section contains electrical characteristics of the device as well as temperature and power considerations.
7 Value of PCR.IBE bit must be 0
8 Be aware that this pad is used on the MPC5607B 100-pin and 144-pin to provide VDD_HV_ADC and
VSS_HV_ADC1. Therefore, you should be careful in ensuring compatibility between MPC5604B/C and
MPC5607B.
9 Out of reset all the functional pins except PC[0:1] and PH[9:10] are available to the user as GPIO.
PC[0:1] are available as JTAG pins (TDI and TDO respectively).
PH[9:10] are available as JTAG pins (TCK and TMS respectively).
If the user configures these JTAG pins in GPIO mode the device is no longer compliant with IEEE 1149.1-2001.
10 The TDO pad has been moved into the STANDBY domain in order to allow low-power debug handshaking in
STANDBY mode. However, no pull-resistor is active on the TDO pad while in STANDBY mode. At this time the pad
is configured as an input. When no debugger is connected the TDO pad is floating causing additional current
consumption. To avoid the extra consumption TDO must be connected. An external pull-up resistor in the range of
47–100 k
should be added between the TDO pin and VDD_HV. Only in case the TDO pin is used as application
pin and a pull-up cannot be used then a pull-down resistor with the same value should be used between TDO pin
and GND instead.
11 Available only on MPC560xC versions, MPC5603B 64 LQFP, MPC5604B 64 LQFP and MPC5604B 208 MAPBGA
devices
12 Not available on MPC5602B devices
13 Not available in 100 LQFP package
14 Available only on MPC5604B 208 MAPBGA devices
15 Not available on MPC5603B 144-pin devices
Table 6. Nexus 2+ pin descriptions
Debug pin
Function
I/O
direction
Pad type
Function
after reset
Pin number
100
LQFP
144
LQFP
208 MAP
BGA1
1 208 MAPBGA available only as development package for Nexus2+
MCKO
Message clock out
O
F
—
T4
MDO0
Message data out 0
O
M
—
H15
MDO1
Message data out 1
O
M
—
H16
MDO2
Message data out 2
O
M
—
H14
MDO3
Message data out 3
O
M
—
H13
EVTI
Event in
I
M
Pull-up
—
K1
EVTO
Event out
O
M
—
L4
MSEO
Message start/end out
O
M
—
G16
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相關代理商/技術參數(shù)
參數(shù)描述
PPC5604BCLL64 功能描述:MCU 32BIT 512K 64MHZ RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MPC56xx Qorivva 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件
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