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參數(shù)資料
| 型號： | PIC18LF96J65-I/PT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 116/131頁 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 48KX16 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 41.667MHz |
| 連通性： | EBI/EMI，以太網(wǎng)，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 70 |
| 程序存儲器容量： | 96KB（48K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 3808 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TQFP |
| 包裝： | 托盤 |
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2011 Microchip Technology Inc.
DS39762F-page 85
PIC18F97J60 FAMILY
6.2.3
INSTRUCTIONS IN PROGRAM
MEMORY
The program memory is addressed in bytes. Instruc-
tions are stored as two bytes or four bytes in program
memory. The Least Significant Byte (LSB) of an
instruction word is always stored in a program memory
location with an even address (LSb = 0). To maintain
alignment with instruction boundaries, the PC incre-
ments in steps of 2 and the LSb will always read ‘0’ (see
Figure 6-6 shows an example of how instruction words
are stored in the program memory.
The CALL and GOTO instructions have the absolute
program memory address embedded into the instruction.
Since instructions are always stored on word boundaries,
the data contained in the instruction is a word address.
The word address is written to PC<20:1> which
accesses the desired byte address in program memory.
Instruction #2 in Figure 6-6 shows how the instruction,
GOTO
0006h
, is encoded in the program memory.
Program branch instructions, which encode a relative
address offset, operate in the same manner. The offset
value stored in a branch instruction represents the
number of single-word instructions that the PC will be
offset by. Section 26.0 “Instruction Set Summary”
provides further details of the instruction set.
FIGURE 6-6:
INSTRUCTIONS IN PROGRAM MEMORY
6.2.4
TWO-WORD INSTRUCTIONS
The standard PIC18 instruction set has four, two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instructions always has
‘1111’ as its four Most Significant bits (MSbs); the other
12 bits are literal data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction
specifies a special form of NOP. If the instruction is
executed in proper sequence, immediately after the
first word, the data in the second word is accessed and
used by the instruction sequence. If the first word is
skipped, for some reason, and the second word is
executed by itself, a NOP is executed instead. This is
necessary for cases when the two-word instruction is
preceded by a conditional instruction that changes the
PC. Example 6-4 shows how this works.
EXAMPLE 6-4:
TWO-WORD INSTRUCTIONS
Word Address
LSB = 1
LSB = 0
Program Memory
Byte Locations
000000h
000002h
000004h
000006h
Instruction 1:
MOVLW
055h
0Fh
55h
000008h
Instruction 2:
GOTO
0006h
EFh
03h
00000Ah
F0h
00h
00000Ch
Instruction 3:
MOVFF
123h, 456h
C1h
23h
00000Eh
F4h
56h
000010h
000012h
000014h
Note:
for
information on two-word instructions in
the extended instruction set.
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; No, skip this word
1111 0100 0101 0110
; Execute this word as a NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; Yes, execute this word
1111 0100 0101 0110
; 2nd word of instruction
0010 0100 0000 0000
ADDWF
REG3
; continue code
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