參數(shù)資料
型號： PIC18LF6520T-I/PTG
廠商： Microchip Technology
文件頁數(shù)： 126/165頁
文件大?。?/td> 0K
描述： IC MCU FLASH 16KX16 64TQFP
標準包裝： 1,200
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 52
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 帶卷 (TR)
其它名稱： PIC18LF6520T-IPTG
2004 Microchip Technology Inc.
DS39609B-page 61
PIC18F6520/8520/6620/8620/6720/8720
5.0
FLASH PROGRAM MEMORY
The Flash program memory is readable, writable and
erasable, during normal operation over the entire VDD
range.
A read from program memory is executed on one byte
at a time. A write to program memory is executed on
blocks of 8 bytes at a time. Program memory is erased
in blocks of 64 bytes at a time. A bulk erase operation
may not be issued from user code.
Writing or erasing program memory will cease
instruction fetches until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP
.
5.1
Table Reads and Table Writes
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data
RAM:
Table Read (TBLRD)
Table Write (TBLWT)
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program mem-
ory and place it into the data RAM space. Figure 5-1
shows the operation of a table read with program
memory and data RAM.
Table write operations store data from the data memory
space into holding registers in program memory. The
procedure to write the contents of the holding registers
into program memory is detailed in Section 5.5
shows the operation of a table write with program
memory and data RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word aligned. Therefore, a table block
can start and end at any byte address. If a table write is
being used to write executable code into program
memory, program instructions will need to be word
aligned.
FIGURE 5-1:
TABLE READ OPERATION
Table Pointer(1)
Table Latch (8-bit)
Program Memory
TBLPTRH
TBLPTRL
TABLAT
TBLPTRU
Instruction: TBLRD*
Note 1:
Table Pointer points to a byte in program memory.
Program Memory
(TBLPTR)
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