參數(shù)資料
型號(hào): PIC18LF258-I/SO
廠商: Microchip Technology
文件頁數(shù): 39/116頁
文件大?。?/td> 0K
描述: IC MCU CAN FLASH 16K LP 28-SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 27
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 1.5K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
2006 Microchip Technology Inc.
DS41159E-page 27
PIC18FXX8
3.7
Time-out Sequence
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired, then OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 3-7 depict time-out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire.
Bringing MCLR high will begin execution immediately
(Figure 3-5). This is useful for testing purposes or to
synchronize more than one
PIC18FXX8 device
operating in parallel.
Table 3-2 shows the Reset conditions for some Special
Function Registers, while Table 3-3 shows the Reset
conditions for all registers.
TABLE 3-1:
TIME-OUT IN VARIOUS SITUATIONS
REGISTER 3-1:
RCON REGISTER BITS AND POSITIONS
TABLE 3-2:
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Oscillator
Configuration
Power-up(2)
Brown-out(2)
Wake-up from
Sleep or
Oscillator Switch
PWRTEN = 0
PWRTEN = 1
HS with PLL enabled(1) 72 ms + 1024 TOSC + 2 ms 1024 TOSC + 2 ms 72 ms + 1024 TOSC + 2 ms 1024 TOSC + 2 ms
HS, XT, LP
72 ms + 1024 TOSC
1024 TOSC
72 ms + 1024 TOSC
1024 TOSC
EC
72 ms
72 ms
External RC
72 ms
72 ms
Note 1:
2 ms = Nominal time required for the 4x PLL to lock.
2:
72 ms is the nominal Power-up Timer delay.
R/W-0
U-0
R/W-1
R/W-0
R/W-1
IPEN
—RI
TO
PD
POR
BOR
bit 7
bit 0
Condition
Program
Counter
RCON
Register
RI
TO
PD
POR
BOR
STKFUL
STKUNF
Power-on Reset
0000h
0--1 110q
1
0
u
MCLR Reset during normal
operation
0000h
0--0 011q
u
Software Reset during normal
operation
0000h
0--0 011q
0
u
Stack Full Reset during normal
operation
0000h
0--0 011q
u
1
u
1
Stack Underflow Reset during
normal operation
0000h
0--0 011q
u
1
u
MCLR Reset during Sleep
0000h
0--0 011q
u
1
0
u
WDT Reset
0000h
0--0 011q
u
0
1
u
WDT Wake-up
PC + 2
0--1 101q
u
0
u
Brown-out Reset
0000h
0--1 110q
1
u
0
u
Interrupt wake-up from Sleep
PC + 2(1)
0--1 101q
u
1
0
u
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
Note 1:
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (000008h or 000018h).
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