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  • 參數(shù)資料
    型號(hào): PIC18F43K22-I/MV
    廠商: Microchip Technology
    文件頁數(shù): 47/71頁
    文件大小: 0K
    描述: MCU PIC 8KB FLASH 40QFN
    產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
    標(biāo)準(zhǔn)包裝: 73
    系列: PIC® XLP™ 18F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 64MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測/復(fù)位,HLVD,POR,PWM,WDT
    輸入/輸出數(shù): 35
    程序存儲(chǔ)器容量: 8KB(4K x 16)
    程序存儲(chǔ)器類型: 閃存
    EEPROM 大?。?/td> 256 x 8
    RAM 容量: 512 x 8
    電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 30x10b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 40-UFQFN 裸露焊盤
    包裝: 管件
    2010-2012 Microchip Technology Inc.
    DS41412F-page 51
    PIC18(L)F2X/4XK22
    3.3
    Sleep Mode
    The Power-Managed Sleep mode in the PIC18(L)F2X/
    4XK22 devices is identical to the legacy Sleep mode
    offered in all other PIC microcontroller devices. It is
    entered by clearing the IDLEN bit of the OSCCON
    register and executing the SLEEP instruction. This shuts
    down the selected oscillator (Figure 3-4) and all clock
    source Status bits are cleared.
    Entering the Sleep mode from either Run or Idle mode
    does not require a clock switch. This is because no
    clocks are needed once the controller has entered
    Sleep. If the WDT is selected, the LFINTOSC source
    will continue to operate. If the SOSC oscillator is
    enabled, it will also continue to run.
    When a wake event occurs in Sleep mode (by interrupt,
    Reset or WDT time-out), the device will not be clocked
    until the clock source selected by the SCS<1:0> bits
    becomes ready (see Figure 3-5), or it will be clocked
    from the internal oscillator block if either the Two-Speed
    Start-up or the Fail-Safe Clock Monitor are enabled
    either case, the OSTS bit is set when the primary clock
    is providing the device clocks. The IDLEN and SCS bits
    are not affected by the wake-up.
    3.4
    Idle Modes
    The Idle modes allow the controller’s CPU to be
    selectively shut down while the peripherals continue to
    operate. Selecting a particular Idle mode allows users
    to further manage power consumption.
    If the IDLEN bit is set to a ‘1’ when a SLEEP instruction is
    executed, the peripherals will be clocked from the clock
    source selected by the SCS<1:0> bits; however, the CPU
    will not be clocked. The clock source status bits are not
    affected. Setting IDLEN and executing a SLEEP instruc-
    tion provides a quick method of switching from a given
    Run mode to its corresponding Idle mode.
    If the WDT is selected, the LFINTOSC source will con-
    tinue to operate. If the SOSC oscillator is enabled, it will
    also continue to run.
    Since the CPU is not executing instructions, the only
    exits from any of the Idle modes are by interrupt, WDT
    time-out, or a Reset. When a wake event occurs, CPU
    execution is delayed by an interval of TCSD while it
    becomes ready to execute code. When the CPU
    begins executing code, it resumes with the same clock
    source for the current Idle mode. For example, when
    waking from RC_IDLE mode, the internal oscillator
    block will clock the CPU and peripherals (in other
    words, RC_RUN mode). The IDLEN and SCS bits are
    not affected by the wake-up.
    While in any Idle mode or the Sleep mode, a WDT
    time-out will result in a WDT wake-up to the Run mode
    currently specified by the SCS<1:0> bits.
    FIGURE 3-4:
    TRANSITION TIMING FOR ENTRY TO SLEEP MODE
    Q4
    Q3
    Q2
    OSC1
    Peripheral
    Sleep
    Program
    Q1
    Counter
    Clock
    CPU
    Clock
    PC + 2
    PC
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