參數(shù)資料
型號: PIC16LF72T-I/SS
廠商: Microchip Technology
文件頁數(shù): 89/136頁
文件大?。?/td> 0K
描述: IC MCU FLASH 2KX14 LV AD 28-SSOP
產(chǎn)品培訓模塊: Asynchronous Stimulus
標準包裝: 2,100
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
PIC16F72
DS39597C-page 54
2007 Microchip Technology Inc.
REGISTER 10-2:
ADCON1: A/D CONTROL REGISTER 1 (ADDRESS 9Fh)
The ADRES register contains the result of the A/D con-
version. When the A/D conversion is complete, the
result is loaded into the ADRES register, the GO/DONE
bit (ADCON0<2>) is cleared, and A/D interrupt flag bit
ADIF is set. The block diagram of the A/D module is
shown in Figure 10-1.
The value in the ADRES register is not modified for a
Power-on Reset. The ADRES register will contain
unknown data after a Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 10.1.
After this acquisition time has elapsed, the A/D
conversion can be started.
The following steps should be followed for doing an
A/D conversion:
1.
Configure the A/D module:
Configure analog pins/voltage reference and
digital I/O (ADCON1)
Select A/D input channel (ADCON0)
Select A/D conversion clock (ADCON0)
Turn on A/D module (ADCON0)
2.
Configure A/D interrupt (if desired):
Clear ADIF bit
Set ADIE bit
Set GIE bit
3.
Wait the required acquisition time.
4.
Start conversion:
Set GO/DONE bit (ADCON0)
5.
Wait for A/D conversion to complete, by either:
Polling for the GO/DONE bit to be cleared
OR
Waiting for the A/D interrupt
6.
Read A/D Result register (ADRES), clear bit
ADIF if required.
7.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2 TAD is
required before the next acquisition starts.
U-0
R/W-0
PCFG2
PCFG1
PCFG0
bit 7
bit 0
bit 7-3
Unimplemented: Read as ‘0’
bit 2-0
PCFG<2:0>: A/D Port Configuration Control bits
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
A = Analog input
D = Digital I/O
PCFG2:PCFG0
RA0
RA1
RA2
RA5
RA3
VREF
000
AA
A
VDD
001
AA
A
VREF
RA3
010
AA
A
VDD
011
AA
A
VREF
RA3
100
AA
D
A
VDD
101
AA
D
VREF
RA3
11x
DD
D
VDD
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