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8201, 8202, 8203, 8204 Acceleration Processor Data Sheet, DS-0157-05
Page 41
Exar Confidential
3
Data Structures
This section describes the 820x data structures for the command pointer ring, result ring,
free pool ring, and the command structure format.
3.1 Command Pointer Ring
The command pointer ring is a linear array of command pointers which point to the actual
command structures. The 820x uses only indirect command addressing to execute
commands. By using indirect command addressing, the commands themselves may be
located anywhere in host memory but must be 512-byte aligned.
The host software must maintain the command pointer ring and ensure that the command
pointer ring base address is 8-byte aligned. The entries in the command pointer ring should
be entered in consecutive order.
In 32-bit addressing mode, every command pointer is 4 bytes; in 64-bit addressing mode,
every command pointer is 8 bytes.
The maximum number of command pointers in the command pointer ring is configurable by
the host using the DMA control registers, specifically the DMA Configuration Register (see
memory location of the command pointer ring and command structure, it should update the
820x related DMA control registers. The 820x will fetch the command pointer, and then
fetch the command structure. The detailed command execution flow is described in
Figure 3-1. Command Pointer Ring Format