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PIC18F2450/4450
DS39760A-page 126
Advance Information
2006 Microchip Technology Inc.
TABLE 13-2:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
RCON
IPEN
SBOREN(1)
—
RI
TO
PD
POR
BOR
PIR1
—
ADIF
RCIF
TXIF
—CCP1IF
TMR2IF
TMR1IF
PIE1
—
ADIE
RCIE
TXIE
—CCP1IE
TMR2IE
TMR1IE
IPR1
—
ADIP
RCIP
TXIP
—CCP1IP
TMR2IP
TMR1IP
TRISC
TRISC7
TRISC6
—
TRISC2
TRISC1
TRISC0
TMR1L
Timer1 Register Low Byte
TMR1H
Timer1 Register High Byte
T1CON
RD16
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS
TMR1ON
CCPR1L
Capture/Compare/PWM Register 1 Low Byte
CCPR1H
Capture/Compare/PWM Register 1 High Byte
CCP1CON
—
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare and Timer1.
Note 1:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.