IPD Power-down Current
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16F877-10E/L
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 64/218闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU FLASH 8KX14 EE 44PLCC
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Asynchronous Stimulus
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 27
绯诲垪锛� PIC® 16F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 10MHz
閫i€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 33
绋嬪簭瀛樺劜鍣ㄥ閲忥細 14KB锛�8K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶�?銆�?/td> 256 x 8
RAM 瀹归噺锛� 368 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 澶栭儴
宸ヤ綔婧害锛� -40°C ~ 125°C
灏佽/澶栨锛� 44-LCC锛圝 褰㈠紩绶氾級
鍖呰锛� 绠′欢
閰嶇敤锛� 309-1040-ND - ADAPTER 44-PLCC ZIF TO 40-DIP
309-1039-ND - ADAPTER 44-PLCC TO 40-DIP
鍏跺畠鍚嶇ū锛� PIC16F87710E/L
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PIC16F87X
DS30292C-page 154
2001 Microchip Technology Inc.
IPD
Power-down Current(3,5)
D020
16LF87X
鈥�
7.5
30
AVDD = 3.0V, WDT enabled,
-40
掳C to +85掳C
D020
16F87X
鈥�
10.5
42
A
VDD = 4.0V, WDT enabled,
-40
掳C to +85掳C
D021
16LF87X
鈥�
0.9
5
AVDD = 3.0V, WDT enabled,
0
掳C to +70掳C
D021
16F87X
鈥�
1.5
16
A
VDD = 4.0V, WDT enabled,
-40
掳C to +85掳C
D021A
16LF87X
0.9
5
AVDD = 3.0V, WDT enabled,
-40
掳C to +85掳C
D021A
16F87X
1.5
19
A
VDD = 4.0V, WDT enabled,
-40
掳C to +85掳C
D023
IBOR Brown-out
Reset Current(6)
鈥�
85
200
A
BOR enabled, VDD = 5.0V
15.1
DC Characteristics:
PIC16F873/874/876/877-04 (Commercial, Industrial)
PIC16F873/874/876/877-20 (Commercial, Industrial)
PIC16LF873/874/876/877-04 (Commercial, Industrial)
(Continued)
PIC16LF873/874/876/877-04
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
0掳C
鈮� TA 鈮� +70掳C for commercial
PIC16F873/874/876/877-04
PIC16F873/874/876/877-20
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
0掳C
鈮� TA 鈮� +70掳C for commercial
Param
No.
Symbol
Characteristic/
Device
Min
Typ
Max
Units
Conditions
Legend: Rows with standard voltage device data only are shaded for improved readability.
Data in 鈥淭yp鈥� column is at 5V, 25掳C, unless otherwise stated. These parameters are for design guidance
only, and are not tested.
Note 1: This is the limit to which VDD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading, switching rate, oscillator type, internal code execution pattern and temperature also have an impact
on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to VDD;
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc configuration, current through REXT is not included. The current through the resistor can be esti-
mated by the formula Ir = VDD/2REXT (mA) with REXT in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20
A to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6: The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7: When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached.
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