SSPxCON1: MSSPx CONTROL REGISTER 1 (I
參數(shù)資料
型號： PIC16F74T-I/ML
廠商： Microchip Technology
文件頁數(shù)： 11/104頁
文件大?。?/td> 0K
描述： IC MCU FLASH 4KX14 A/D 44QFN
標準包裝： 1,600
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
連通性： I²C，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 7KB（4K x 14）
程序存儲器類型： 閃存
RAM 容量： 192 x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 8x8b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-VQFN 裸露焊盤
包裝： 帶卷 (TR)
2009 Microchip Technology Inc.
DS39682E-page 161
PIC18F45J10 FAMILY
REGISTER 16-4:
SSPxCON1: MSSPx CONTROL REGISTER 1 (I2C MODE)
R/W-0
WCOL
SSPOV
SSPEN(1)
CKP
SSPM3
SSPM2
SSPM1
SSPM0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
WCOL:
Write Collision Detect bit
In Master Transmit mode:
1
= A write to the SSPxBUF register was attempted while the I2C conditions were not valid for a
transmission to be started (must be cleared in software)
0
= No collision
In Slave Transmit mode:
1
= The SSPxBUF register is written while it is still transmitting the previous word (must be cleared in
software)
0
= No collision
In Receive mode (Master or Slave modes):
This is a “don’t care” bit.
bit 6
SSPOV:
Receive Overflow Indicator bit
In Receive mode:
1
= A byte is received while the SSPxBUF register is still holding the previous byte (must be cleared in
software)
0
= No overflow
In Transmit mode:
This is a “don’t care” bit in Transmit mode.
bit 5
SSPEN:
Master Synchronous Serial Port Enable bit(1)
1
= Enables the serial port and configures the SDAx and SCLx pins as the serial port pins
0
= Disables serial port and configures these pins as I/O port pins
bit 4
CKP:
SCK Release Control bit
In Slave mode:
1
= Release clock
0
= Holds clock low (clock stretch), used to ensure data setup time
In Master mode:
Unused in this mode.
bit 3-0
SSPM<3:0>:
Synchronous Serial Port Mode Select bits
1111
= I2C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
1110
= I2C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
1011
= I2C Firmware Controlled Master mode (slave Idle)
1000
= I2C Master mode, clock = FOSC/(4 * (SSPxADD + 1))
0111
= I2C Slave mode, 10-bit address
0110
= I2C Slave mode, 7-bit address
Bit combinations not specifically listed here are either reserved or implemented in SPI mode only.
Note 1:
When enabled, the SDAx and SCLx pins must be configured as inputs.
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