參數(shù)資料
型號: PIC16F716-I/ML
廠商: Microchip Technology
文件頁數(shù): 10/136頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 28QFN
標(biāo)準(zhǔn)包裝: 61
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 管件
2007 Microchip Technology Inc.
DS41206B-page 105
PIC16F716
FIGURE 12-10:
A/D CONVERSION TIMING
TABLE 12-8:
A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
130
TAD
A/D clock period
Industrial
1.6
μsTOSC based, VREF ≥ 3.0V
Industrial
1.6
4.0
6.0
μs
A/D RC mode
Extended
1.6
μsTOSC based, VREF ≥ 3.0V
Extended
1.6
6.0
9.0
μs
A/D RC mode
131
TCNV Conversion time (not including S/H time)(1)
9.5
9.5
TAD
132
TACQ Acquisition time
(Note 2)
5*
20
μs
The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the last
sampled voltage (as stated on
CHOLD).
134
TGO Q4 to A/D clock start
TOSC/2 **
If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
135
TSWC Switching from convert
→ sample time
1.5 **
TAD
*
These parameters are characterized but not tested.
** This specification ensured by design.
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1:
ADRES register may be read on the following TCY cycle.
2:
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(TOSC/2)(1)
7
6
5
432
1
0
Note
1:
If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction
to be executed.
1 Tcy
134
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