參數(shù)資料
型號(hào)： PIC16F526-E/ST
廠商： Microchip Technology
文件頁(yè)數(shù)： 55/122頁(yè)
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 1KX12 14TSSOP
標(biāo)準(zhǔn)包裝： 96
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 11
程序存儲(chǔ)器容量： 1.5KB（1K x 12）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 67 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 3x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
包裝： 管件
配用： ICE2000-ND - EMULATOR MPLAB-ICE 2000 POD
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PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 38
2009 Microchip Technology Inc.
3.8
Effects of Power-Managed Modes
on the Various Clock Sources
When PRI_IDLE mode is selected, the designated pri-
mary oscillator continues to run without interruption.
For all other power-managed modes, the oscillator
using the OSC1 pin is disabled. The OSC1 pin (and
OSC2 pin in Crystal Oscillator modes) will stop
oscillating.
In
secondary
clock
modes
(SEC_RUN
and
SEC_IDLE), the Timer1 oscillator is operating and
providing the device clock. The Timer1 oscillator may
also run in all power-managed modes if required to
clock Timer1 or Timer3.
In internal oscillator modes (RC_RUN and RC_IDLE),
the internal oscillator block provides the device clock
source. The 31 kHz INTRC output can be used directly
to provide the clock and may be enabled to support
various special features, regardless of the power-
information). The INTOSC output at 8 MHz may be
used directly to clock the device or may be divided
down by the postscaler. The INTOSC output is disabled
if the clock is provided directly from the INTRC output.
The INTOSC output is also enabled for Two-Speed
Start-up at 1 MHz after a Reset.
If the Sleep mode is selected, all clock sources are
stopped. Since all the transistor switching currents
have been stopped, Sleep mode achieves the lowest
current consumption of the device (only leakage
currents).
Enabling any on-chip feature that will operate during
Sleep will increase the current consumed during Sleep.
The INTRC is required to support WDT operation. The
Timer1 oscillator may be operating to support a Real-
Time Clock. Other features may be operating that do
not require a device clock source (i.e., MSSP slave,
PSP, INTx pins and others). Peripherals that may add
significant
current
consumption
are
listed
in
Section 27.2 “DC Characteristics”.
3.9
Power-up Delays
Power-up delays are controlled by two or three timers,
so that no external Reset circuitry is required for most
applications. The delays ensure that the device is kept
in Reset until the device power supply is stable under
normal circumstances and the primary clock is operat-
ing and stable. For additional information on power-up
The first timer is the Power-up Timer (PWRT) which
provides a fixed delay on power-up (parameter 33,
Table 27-10). It is enabled by clearing (= 0) the
PWRTEN Configuration bit (CONFIG2L<0>).
3.9.1
DELAYS FOR POWER-UP AND
RETURN TO PRIMARY CLOCK
The second timer is the Oscillator Start-up Timer
(OST), intended to delay execution until the crystal
oscillator is stable (LP, XT and HS modes). The OST
does this by counting 1024 oscillator cycles before
allowing the oscillator to clock the device.
When the HSPLL Oscillator mode is selected, a third
timer delays execution for an additional 2 ms following
the HS mode OST delay, so the PLL can lock to the
incoming clock frequency. At the end of these delays,
the OSTS bit (OSCCON<3>) is set.
There is a delay of interval TCSD (parameter 38,
Table 27-10), once execution is allowed to start, when
the controller becomes ready to execute instructions.
This delay runs concurrently with any other delays.
This may be the only delay that occurs when any of the
EC, RC or INTIO modes are used as the primary clock
source.
TABLE 3-3:
OSC1 AND OSC2 PIN STATES IN SLEEP MODE
OSC Mode
OSC1 Pin
OSC2 Pin
RC, INTIO1
Floating, external resistor pulls high
At logic low (clock/4 output)
RCIO
Floating, external resistor pulls high
Configured as PORTA, bit 6
INTIO2
Configured as PORTA, bit 7
Configured as PORTA, bit 6
ECIO
Floating, driven by external clock
Configured as PORTA, bit 6
EC
Floating, driven by external clock
At logic low (clock/4 output)
LP, XT and HS
Feedback inverter disabled at quiescent
voltage level
Feedback inverter disabled at quiescent
voltage level
Note:
See Table 5-2 in Section 5.0 “Reset” for time-outs due to Sleep and MCLR Reset.
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參數(shù)描述
PIC16F526-I/MG 功能描述:8位微控制器 -MCU 1.5KB Flash Program 8MHz Int Osc RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16F526-I/P 功能描述:8位微控制器 -MCU 15KB 64B 8MHz 8B ADC Internal Oscillator RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16F526-I/SL 功能描述:8位微控制器 -MCU 15KB 64B 8MHz 8B ADC Internal Oscillator RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC16F526-I/SLC04 制造商:Microchip Technology Inc 功能描述:
PIC16F526-I/ST 功能描述:8位微控制器 -MCU 15KB 64B 8MHz 8B ADC Internal Oscillator RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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