參數(shù)資料
型號(hào): PIC16CE624T-30/SS
廠商: Microchip Technology
文件頁數(shù): 78/100頁
文件大?。?/td> 0K
描述: IC MCU OTP 1KX14 EE COMP 20SSOP
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 30MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
輸入/輸出數(shù): 13
程序存儲(chǔ)器容量: 1.75KB(1K x 14)
程序存儲(chǔ)器類型: OTP
EEPROM 大小: 128 x 8
RAM 容量: 96 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
其它名稱: PIC16CE624T30/SS
1999 Microchip Technology Inc.
DS40182C-page 69
PIC16CE62X
BTFSS
Bit Test f, Skip if Set
Syntax:
[
label ] BTFSS f,b
Operands:
0
≤ f ≤ 127
0
≤ b < 7
Operation:
skip if (f<b>) = 1
Status Affected:
None
Encoding:
01
11bb
bfff
ffff
Description:
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and a NOP is
executed instead, making this a
two-cycle instruction.
Words:
1
Cycles:
1(2)
Example
HERE
FALSE
TRUE
BTFSS
GOTO
FLAG,1
PROCESS_CODE
Before Instruction
PC =
address
HERE
After Instruction
if FLAG<1> = 0,
PC =
address FALSE
if FLAG<1> = 1,
PC =
address TRUE
CALL
Call Subroutine
Syntax:
[
label ] CALL k
Operands:
0
≤ k ≤ 2047
Operation:
(PC)+ 1
→ TOS,
k
→ PC<10:0>,
(PCLATH<4:3>)
→ PC<12:11>
Status Affected:
None
Encoding:
10
0kkk
kkkk
Description:
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle instruc-
tion.
Words:
1
Cycles:
2
Example
HERE
CALL
THERE
Before Instruction
PC = Address HERE
After Instruction
PC = Address THERE
TOS = Address HERE+1
CLRF
Clear f
Syntax:
[
label ] CLRF
f
Operands:
0
≤ f ≤ 127
Operation:
00h
→ (f)
1
→ Z
Status Affected:
Z
Encoding:
00
0001
1fff
ffff
Description:
The contents of register ’f’ are cleared
and the Z bit is set.
Words:
1
Cycles:
1
Example
CLRF
FLAG_REG
Before Instruction
FLAG_REG
=
0x5A
After Instruction
FLAG_REG
=
0x00
Z=
1
CLRW
Clear W
Syntax:
[
label ] CLRW
Operands:
None
Operation:
00h
→ (W)
1
→ Z
Status Affected:
Z
Encoding:
00
0001
0000
0011
Description:
W register is cleared. Zero bit (Z) is
set.
Words:
1
Cycles:
1
Example
CLRW
Before Instruction
W
=
0x5A
After Instruction
W
=
0x00
Z=
1
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