
2000 Microchip Technology Inc.
Preliminary
DS41124C-page 23
PIC16C745/765
4.2.2.2
OPTION REGISTER
The OPTION_REG register is a readable and writable
register, which contains various control bits to configure
the TMR0/WDT prescaler, the external INT Interrupt,
TMR0 and the weak pull-ups on PORTB.
REGISTER 4-2:
OPTION REGISTER (OPTION_REG: 81h, 181h)
Note:
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
R/W-1
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
-n = Value at POR reset
bit7
bit0
bit 7:
RBPU: PORTB Pull-up Enable bit
1
= PORTB pull-ups are disabled
0
= PORTB pull-ups are enabled by individual port latch values
bit 6:
INTEDG: Interrupt Edge Select bit
1
= Interrupt on rising edge of RB0/INT pin
0
= Interrupt on falling edge of RB0/INT pin
bit 5:
T0CS: TMR0 Clock Source Select bit
1
= Transition on RA4/T0CKI pin
0
= Internal instruction cycle clock (CLKOUT)
bit 4:
T0SE: TMR0 Source Edge Select bit
1
= Increment on high-to-low transition on RA4/T0CKI pin
0
= Increment on low-to-high transition on RA4/T0CKI pin
bit 3:
PSA: Prescaler Assignment bit
1
= Prescaler is assigned to the WDT
0
= Prescaler is assigned to the Timer0 module
bit 2-0:
PS<2:0>: Prescaler Rate Select bits
000
001
010
011
100
101
110
111
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
Bit Value
TMR0 Rate
WDT Rate
745cov.book Page 23 Wednesday, August 2, 2000 8:24 AM