參數(shù)資料
型號: PIC16C71-20/SO
廠商: Microchip Technology
文件頁數(shù): 27/177頁
文件大小: 0K
描述: IC MCU OTP 1KX14 A/D 18SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 42
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: OTP
RAM 容量: 36 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
包裝: 管件
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
309-1011-ND - ADAPTER 18-SOIC TO 18-DIP
309-1010-ND - ADAPTER 18-SOIC TO 18-DIP
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
122
7593L–AVR–09/12
AT90USB64/128
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation selected by
the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
15.5
Input Capture unit
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicating an event, or mul-
tiple events, can be applied via the ICPn pin or alternatively, for the Timer/Counter1 only, via the
Analog Comparator unit. The time-stamps can then be used to calculate frequency, duty-cycle,
and other features of the signal applied. Alternatively the time-stamps can be used for creating a
log of the events.
The Input Capture unit is illustrated by the block diagram shown in Figure 15-3. The elements of
the block diagram that are not directly a part of the input capture unit are gray shaded. The small
“n” in register and bit names indicates the Timer/Counter number.
Figure 15-3. Input Capture Unit block diagram.
Note:
The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 ICP – not
Timer/Counter3, 4, or 5.
When a change of the logic level (an event) occurs on the Input Capture Pin (ICPn), alternatively
on the analog Comparator output (ACO), and this change confirms to the setting of the edge
detector, a capture will be triggered. When a capture is triggered, the 16-bit value of the counter
(TCNTn) is written to the Input Capture Register (ICRn). The Input Capture Flag (ICFn) is set at
the same system clock as the TCNTn value is copied into ICRn Register. If enabled (TICIEn =
1), the input capture flag generates an input capture interrupt. The ICFn flag is automatically
cleared when the interrupt is executed. Alternatively the ICFn flag can be cleared by software by
writing a logical one to its I/O bit location.
ICFn (int.req.)
Analog
comparator
WRITE
ICRn (16-bit register)
ICRnH (8-bit)
Noise
canceler
ICPn
Edge
detector
TEMP (8-bit)
DATA BUS (8-bit)
ICRnL (8-bit)
TCNTn (16-bit counter)
TCNTnH (8-bit)
TCNTnL (8-bit)
ACIC*
ICNC
ICES
ACO*
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