參數(shù)資料
型號: PIC16C71-04I/P
廠商: Microchip Technology
文件頁數(shù): 25/177頁
文件大?。?/td> 0K
描述: IC MCU OTP 1KX14 A/D 18DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: OTP
RAM 容量: 36 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1059-ND - ADAPTER 18 ZIF BD W/18SO PLUGS
DVA16XP180-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
120
7593L–AVR–09/12
AT90USB64/128
The following code examples show how to do an atomic write of the TCNTn Register contents.
Writing any of the OCRnA/B/C or ICRn Registers can be done by using the same principle.
Note:
The assembly code example requires that the r17:r16 register pair contains the value to be writ-
ten to TCNTn.
15.2.1
Reusing the Temporary High Byte register
If writing to more than one 16-bit register where the high byte is the same for all registers written,
then the high byte only needs to be written once. However, note that the same rule of atomic
operation described previously also applies in this case.
15.3
Timer/Counter clock sources
The Timer/Counter can be clocked by an internal or an external clock source. The clock source
is selected by the Clock Select logic which is controlled by the Clock Select (CSn2:0) bits
located in the Timer/Counter control Register B (TCCRnB). For details on clock sources and
Assembly code example
TIM16_WriteTCNTn:
; Save global interrupt flag
in
r18,SREG
; Disable interrupts
cli
; Set TCNTn to r17:r16
out
TCNTnH,r17
out
TCNTnL,r16
; Restore global interrupt flag
out
SREG,r18
ret
C code example
void
TIM16_WriteTCNTn( unsigned int i )
{
unsigned char
sreg;
unsigned int
i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
__disable_interrupt();
/* Set TCNTn to i */
TCNTn = i;
/* Restore global interrupt flag */
SREG = sreg;
}
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