參數(shù)資料
型號: PIC16C432-I/SS
廠商: Microchip Technology
文件頁數(shù): 29/70頁
文件大小: 0K
描述: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 67
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: LIN(本地互連網(wǎng)絡(luò))
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 636 (CN2011-ZH PDF)
配用: AC164029-ND - MODULE SKT PROMATEII 20DIP/SSOP
2002 Microchip Technology Inc.
Preliminary
DS41140B-page 33
PIC16C432
7.0
COMPARATOR MODULE
The
comparator
module
contains
two
analog
comparators. The inputs to the comparators are
multiplexed with the RA0 through RA3 pins. The on-
chip voltage reference (Section 8.0) can also be an
input to the comparators.
The CMCON register, shown in Register 7-1, controls
the comparator input and output multiplexers. A block
diagram of the comparator is shown in Figure 7-1.
REGISTER 7-1:
CMCON REGISTER (ADDRESS 1Fh)
7.1
Comparator Configuration
There
are
eight
modes
of
operation
for
the
comparators. The CMCON register is used to select
the mode. Figure 7-1 shows the eight possible modes.
The TRISA register controls the data direction of the
comparator pins for each mode. If the Comparator
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown
R-0
U-0
R/W-0
C2OUT
C1OUT
CIS
CM2
CM1
CM0
bit7
bit0
bit 7
C2OUT: Comparator 2 Output bit
1
= C2 VIN+ > C2 VIN-
0
= C2 VIN+ < C2 VIN-
bit 6
C1OUT: Comparator 1 Output bit
1
= C1 VIN+ > C1 VIN-
0
= C1 VIN+ < C1 VIN-
bit 5-4
Unimplemented: Read as '0'
bit 3
CIS: Comparator Input Switch bit
When CM<2:0> = 001:
1
= C1 VIN- connects to RA3
0
= C1 VIN- connects to RA0
When CM<2:0> = 010:
1
= C1 VIN- connects to RA3
C2 VIN- connects to RA2
0
= C1 VIN- connects to RA0
C2 VIN- connects to LINRX
bit 2-0
CM<2:0>: Comparator Mode bits
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
Note:
Comparator interrupts should be disabled
during a Comparator mode change, other-
wise a false interrupt may occur.
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