參數資料
型號： PIC12F629-I/P
廠商： Microchip Technology
文件頁數： 34/35頁
文件大?。?/td> 0K
描述： IC MCU CMOS FLASH-BASE 8BIT 8DIP
產品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 60
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設備： POR，WDT
輸入/輸出數： 5
程序存儲器容量： 1.75KB（1K x 14）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量： 64 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-DIP（0.300"，7.62mm）
包裝： 管件
產品目錄頁面： 637 (CN2011-ZH PDF)
配用： DM163029-ND - BOARD PICDEM FOR MECHATRONICS
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
8
0787E–MICRO–3/06
AT89S53
Table 4. SPCR—SPI Control Register
SPCR Address = D5H
Reset Value = 0000 01XXB
SPIE
SPE
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
Bit
7
6
5
4
3
2
1
0
Symbol
Function
SPIE
SPI Interrupt Enable. This bit, in conjunction with the ES bit in the IE register, enables SPI interrupts: SPIE = 1 and ES
= 1 enable SPI interrupts. SPIE = 0 disables SPI interrupts.
SPE
SPI Enable. SPI = 1 enables the SPI channel and connects SS, MOSI, MISO and SCK to pins P1.4, P1.5, P1.6, and
P1.7. SPI = 0 disables the SPI channel.
DORD
Data Order. DORD = 1 selects LSB first data transmission. DORD = 0 selects MSB first data transmission.
MSTR
Master/Slave Select. MSTR = 1 selects Master SPI mode. MSTR = 0 selects Slave SPI mode.
CPOL
Clock Polarity. When CPOL = 1, SCK is high when idle. When CPOL = 0, SCK of the master device is low when not
transmitting. Please refer to figure on SPI Clock Phase and Polarity Control.
CPHA
Clock Phase. The CPHA bit together with the CPOL bit controls the clock and data relationship between master and
slave. Please refer to figure on SPI Clock Phase and Polarity Control.
SPR0
SPR1
SPI Clock Rate Select. These two bits control the SCK rate of the device configured as master. SPR1 and SPR0 have
no effect on the slave. The relationship between SCK and the oscillator frequency, F
OSC., is as follows:
SPR1SPR0SCK = F
OSC. divided by
004
01 16
10 64
1
1 128
Table 5. SPSR—SPI Status Register Data Memory - RAM
SPSR Address = AAH
Reset Value = 00XX XXXXB
SPIF
WCOL
–
Bit
7
6
5
4
3
2
1
0
Symbol
Function
SPIF
SPI Interrupt Flag. When a serial transfer is complete, the SPIF bit is set and an interrupt is generated if SPIE = 1 and
ES = 1. The SPIF bit is cleared by reading the SPI status register with SPIF and WCOL bits set, and then accessing
the SPI data register.
WCOL
Write Collision Flag. The WCOL bit is set if the SPI data register is written during a data transfer. During data transfer,
the result of reading the SPDR register may be incorrect, and writing to it has no effect. The WCOL bit (and the SPIF
bit) are cleared by reading the SPI status register with SPIF and WCOL set, and then accessing the SPI data register.
Table 6. SPDR—SPI Data Register
SPDR Address = 86H
Reset Value = unchanged
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
Bit
7
6
5
4
3
2
1
0
相關PDF資料
PDF描述
PIC12F675-I/SN IC MCU CMOS FLSH-BASE 8BIT 8SOIC
PIC17LC43T-08/PT IC MCU OTP 4KX16 PWM 44TQFP
PIC17LC43T-08/PQ IC MCU OTP 4KX16 PWM 44-MQFP
PIC17LC43T-08/L IC MCU OTP 4KX16 PWM 44PLCC
PIC17LC43T-08I/PT IC MCU OTP 4KX16 PWM 44TQFP
相關代理商/技術參數
參數描述
PIC12F629ISN 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin FLASH-Based 8-Bit CMOS Microcontrollers
PIC12F629-ISN 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, Flash-Based 8-Bit CMOS Microcontrollers
PIC12F629T-E/MD 制造商:Microchip Technology Inc 功能描述:8BIT PIC12 RISC 1.75KB FLASH 2 - Tape and Reel
PIC12F629T-E/MF 功能描述:8位微控制器 -MCU 1.75KB 64 RAM 6 I/O Ext Temp DFN8 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12F629T-E/P 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:8-Pin, Flash-Based 8-Bit CMOS Microcontrollers
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*