參數(shù)資料
型號(hào): PIC12F1840-E/P
廠商: Microchip Technology
文件頁(yè)數(shù): 5/122頁(yè)
文件大小: 0K
描述: MCU 7KB FLASH 256B RAM XLP 8PDIP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 60
系列: PIC® XLP™ 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 32MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 7KB(4K x 14)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 256 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
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PIC12(L)F1840
DS41441B-page 102
Preliminary
2011 Microchip Technology Inc.
11.3.2
ERASING FLASH PROGRAM
MEMORY
While executing code, program memory can only be
erased by rows. To erase a row:
1.
Load the EEADRH:EEADRL register pair with
the address of new row to be erased.
2.
Clear the CFGS bit of the EECON1 register.
3.
Set the EEPGD, FREE and WREN bits of the
EECON1 register.
4.
Write 55h, then AAh, to EECON2 (Flash
programming unlock sequence).
5.
Set control bit WR of the EECON1 register to
begin the erase operation.
6.
Poll the FREE bit in the EECON1 register to
determine when the row erase has completed.
After the “BSF EECON1,WR” instruction, the processor
requires two cycles to set up the erase operation. The
user must place two NOP instructions after the WR bit is
set. The processor will halt internal operations for the
typical 2 ms erase time. This is not Sleep mode as the
clocks and peripherals will continue to run. After the
erase cycle, the processor will resume operation with
the third instruction after the EECON1 write instruction.
11.3.3
WRITING TO FLASH PROGRAM
MEMORY
Program memory is programmed using the following
steps:
1.
Load the starting address of the word(s) to be
programmed.
2.
Load the write latches with data.
3.
Initiate a programming operation.
4.
Repeat steps 1 through 3 until all data is written.
Before writing to program memory, the word(s) to be
written must be erased or previously unwritten. Pro-
gram memory can only be erased one row at a time. No
automatic erase occurs upon the initiation of the write.
Program memory can be written one or more words at
a time. The maximum number of words written at one
time is equal to the number of write latches. See
Figure 11-2 (block writes to program memory with 32
write latches) for more details. The write latches are
aligned to the address boundary defined by EEADRL
as shown in Table 11-1. Write operations do not cross
these boundaries. At the completion of a program
memory write operation, the write latches are reset to
contain 0x3FFF.
The following steps should be completed to load the
write latches and program a block of program memory.
These steps are divided into two parts. First, all write
latches are loaded with data except for the last program
memory location. Then, the last write latch is loaded
and the programming sequence is initiated. A special
unlock sequence is required to load a write latch with
data or initiate a Flash programming operation. This
unlock sequence should not be interrupted.
1.
Set the EEPGD and WREN bits of the EECON1
register.
2.
Clear the CFGS bit of the EECON1 register.
3.
Set the LWLO bit of the EECON1 register. When
the LWLO bit of the EECON1 register is ‘1’, the
write sequence will only load the write latches
and will not initiate the write to Flash program
memory.
4.
Load the EEADRH:EEADRL register pair with
the address of the location to be written.
5.
Load the EEDATH:EEDATL register pair with
the program memory data to be written.
6.
Write 55h, then AAh, to EECON2, then set the
WR bit of the EECON1 register (Flash
programming unlock sequence). The write latch
is now loaded.
7.
Increment the EEADRH:EEADRL register pair
to point to the next location.
8.
Repeat steps 5 through 7 until all but the last
write latch has been loaded.
9.
Clear the LWLO bit of the EECON1 register.
When the LWLO bit of the EECON1 register is
‘0’, the write sequence will initiate the write to
Flash program memory.
10. Load the EEDATH:EEDATL register pair with
the program memory data to be written.
11. Write 55h, then AAh, to EECON2, then set the
WR bit of the EECON1 register (Flash
programming unlock sequence). The entire
latch block is now written to Flash program
memory.
It is not necessary to load the entire write latch block
with user program data. However, the entire write latch
block will be written to program memory.
An example of the complete write sequence for 32
words is shown in Example 11-5. The initial address is
loaded into the EEADRH:EEADRL register pair; the 32
words of data are loaded using indirect addressing.
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PIC12F1840-I/MF 制造商:Microchip Technology Inc 功能描述:; Controller Family/Series:PIC12F; Core
PIC12F1840-I/P 功能描述:8位微控制器 -MCU 7KB Flash EEPROM 256b nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC12F1840-I/PC01 制造商:Microchip Technology Inc 功能描述:
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