參數(shù)資料
型號： PIC12F1822-I/MF
廠商： Microchip Technology
文件頁數(shù)： 22/109頁
文件大?。?/td> 0K
描述： IC MCU 8BIT FLASH 8DFN
產品培訓模塊： 8-bit PIC® Microcontroller Portfolio
標準包裝： 120
系列： PIC® XLP™ 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 32MHz
連通性： I²C，LIN，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 6
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 4x10b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-VDFN 裸露焊盤
包裝： 管件
210
7674F–AVR–09/09
ATmega164P/324P/644P
19.2.1
TWI Terminology
The following definitions are frequently encountered in this section.
The Power Reduction TWI bit, PRTWI bit in “PRR – Power Reduction Register” on page 47 must
be written to zero to enable the 2-wire Serial Interface.
19.2.2
Electrical Interconnection
As depicted in Figure 19-1, both bus lines are connected to the positive supply voltage through
pull-up resistors. The bus drivers of all TWI-compliant devices are open-drain or open-collector.
This implements a wired-AND function which is essential to the operation of the interface. A low
level on a TWI bus line is generated when one or more TWI devices output a zero. A high level
is output when all TWI devices trim-state their outputs, allowing the pull-up resistors to pull the
line high. Note that all AVR devices connected to the TWI bus must be powered in order to allow
any bus operation.
The number of devices that can be connected to the bus is only limited by the bus capacitance
limit of 400 pF and the 7-bit slave address space. A detailed specification of the electrical char-
acteristics of the TWI is given in “SPI Timing Characteristics” on page 333. Two different sets of
specifications are presented there, one relevant for bus speeds below 100 kHz, and one valid for
bus speeds up to 400 kHz.
19.3
Data Transfer and Frame Format
19.3.1
Transferring Bits
Each data bit transferred on the TWI bus is accompanied by a pulse on the clock line. The level
of the data line must be stable when the clock line is high. The only exception to this rule is for
generating start and stop conditions.
Table 19-1.
TWI Terminology
Term
Description
Master
The device that initiates and terminates a transmission. The Master also generates the
SCL clock.
Slave
The device addressed by a Master.
Transmitter
The device placing data on the bus.
Receiver
The device reading data from the bus.
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參數(shù)描述
PIC12F1822T-E/SN 制造商:Microchip Technology Inc 功能描述:PIC12F Series 128 B RAM 3.5 kB Flash 8-Bit CMOS Microcontroller - SOIC-8
PIC12F1822T-I/MF 功能描述:8位微控制器 -MCU 3.5KB 128B RAM 32MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12F1822T-I/SN 功能描述:8位微控制器 -MCU 3.5KB 128B RAM 32MHz Int. Osc 6 I/0 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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