參數(shù)資料
型號: PIC12CE674/JW
廠商: Microchip Technology
文件頁數(shù): 119/129頁
文件大?。?/td> 0K
描述: IC MCU EPROM 2KX14 A/D&EE 8CDIP
標(biāo)準(zhǔn)包裝: 56
系列: PIC® 12C
核心處理器: PIC
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: EPROM,UV
EEPROM 大?。?/td> 16 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-CDIP(0.300",7.62mm)窗口
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS30561B-page 9
PIC12C67X
TABLE 3-1:
PIC12C67X PINOUT DESCRIPTION
Name
DIP Pin #
I/O/P
Type
Buffer
Type
Description
GP0/AN0
7
I/O
TTL/ST Bi-directional I/O port/serial programming data/analog input 0.
Can be software programmed for internal weak pull-up and
interrupt-on-pin change. This buffer is a Schmitt Trigger input
when used in serial programming mode.
GP1/AN1/VREF
6
I/O
TTL/ST Bi-directional I/O port/serial programming clock/analog input 1/
voltage reference. Can be software programmed for internal
weak pull-up and interrupt-on-pin change. This buffer is a
Schmitt Trigger input when used in serial programming mode.
GP2/T0CKI/AN2/INT
5
I/O
ST
Bi-directional I/O port/analog input 2. Can be configured as
T0CKI or external interrupt.
GP3/MCLR/VPP
4
I
TTL/ST Input port/master clear (reset) input/programming voltage
input. When configured as MCLR, this pin is an active low
reset to the device. Voltage on MCLR/VPP must not exceed
VDD during normal device operation. Can be software pro-
grammed for internal weak pull-up and interrupt-on-pin
change. Weak pull-up always on if configured as MCLR . This
buffer is Schmitt Trigger when in MCLR mode.
GP4/OSC2/AN3/CLKOUT
3
I/O
TTL
Bi-directional I/O port/oscillator crystal output/analog input 3.
Connections to crystal or resonator in crystal oscillator mode
(HS, XT and LP modes only, GPIO in other modes). In EXTRC
and INTRC modes, the pin output can be configured to CLK-
OUT, which has 1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
GP5/OSC1/CLKIN
2
I/O
TTL/ST Bi-directional IO port/oscillator crystal input/external clock
source input (GPIO in INTRC mode only, OSC1 in all other
oscillator modes). Schmitt trigger input for EXTRC oscillator
mode.
VDD
1P
Positive supply for logic and I/O pins.
VSS
8
P
Ground reference for logic and I/O pins.
Legend: I = input, O = output, I/O = input/output, P = power, — = not used, TTL = TTL input,
ST = Schmitt Trigger input.
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