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    參數(shù)資料
    型號: PIC12CE674-10E/P
    廠商: Microchip Technology
    文件頁數(shù): 110/129頁
    文件大小: 0K
    描述: IC MCU OTP 2KX14 A/D&EE 8DIP
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    標(biāo)準(zhǔn)包裝: 60
    系列: PIC® 12C
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 10MHz
    外圍設(shè)備: POR,WDT
    輸入/輸出數(shù): 5
    程序存儲器容量: 3.5KB(2K x 14)
    程序存儲器類型: OTP
    EEPROM 大?。?/td> 16 x 8
    RAM 容量: 128 x 8
    電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 8-DIP(0.300",7.62mm)
    包裝: 管件
    1999 Microchip Technology Inc.
    DS30561B-page 81
    PIC12C67X
    SWAPF
    Swap Nibbles in f
    Syntax:
    [
    label ] SWAPF f,d
    Operands:
    0
    ≤ f ≤ 127
    d
    ∈ [0,1]
    Operation:
    (f<3:0>)
    → (dest<7:4>),
    (f<7:4>)
    → (dest<3:0>)
    Status Affected:
    None
    Encoding:
    00
    1110
    dfff
    ffff
    Description:
    The upper and lower nibbles of
    register ’f’ are exchanged. If ’d’ is
    0, the result is placed in W regis-
    ter. If ’d’ is 1, the result is placed in
    register ’f’.
    Words:
    1
    Cycles:
    1
    Example
    SWAPF
    REG,
    0
    Before Instruction
    REG1
    =
    0xA5
    After Instruction
    REG1
    =
    0xA5
    W
    =
    0x5A
    TRIS
    Load TRIS Register
    Syntax:
    [
    label ] TRIS
    f
    Operands:
    5
    ≤ f ≤ 7
    Operation:
    (W)
    → TRIS register f;
    Status Affected:
    None
    Encoding:
    00
    0000
    0110
    0fff
    Description:
    The instruction is supported for
    code compatibility with the
    PIC16C5X products. Since TRIS
    registers are readable and writ-
    able, the user can directly address
    them.
    Words:
    1
    Cycles:
    1
    Example
    To maintain upward compatibility
    with future PIC12C67X products,
    do not use this instruction.
    XORLW
    Exclusive OR Literal with W
    Syntax:
    [
    label ]
    XORLW k
    Operands:
    0
    ≤ k ≤ 255
    Operation:
    (W) .XOR. k
    → (W)
    Status Affected:
    Z
    Encoding:
    11
    1010
    kkkk
    Description:
    The contents of the W register
    are XOR’ed with the eight bit lit-
    eral 'k'. The result is placed in the
    W register.
    Words:
    1
    Cycles:
    1
    Example:
    XORLW
    0xAF
    Before Instruction
    W=
    0xB5
    After Instruction
    W
    =
    0x1A
    XORWF
    Exclusive OR W with f
    Syntax:
    [
    label ] XORWF
    f,d
    Operands:
    0
    ≤ f ≤ 127
    d
    ∈ [0,1]
    Operation:
    (W) .XOR. (f)
    → (dest)
    Status Affected:
    Z
    Encoding:
    00
    0110
    dfff
    ffff
    Description:
    Exclusive OR the contents of the
    W register with register 'f'. If 'd' is
    0, the result is stored in the W
    register. If 'd' is 1, the result is
    stored back in register 'f'.
    Words:
    1
    Cycles:
    1
    Example
    XORWF
    REG
    1
    Before Instruction
    REG
    =
    0xAF
    W=
    0xB5
    After Instruction
    REG
    =
    0x1A
    W=
    0xB5
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