參數資料
型號： PIC12C672-10/SM
廠商： Microchip Technology
文件頁數： 77/129頁
文件大?。?/td> 0K
描述： IC MCU OTP 2KX14 A/D 8-SOIJ
產品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 90
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 10MHz
外圍設備： POR，WDT
輸入/輸出數： 5
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： OTP
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數據轉換器： A/D 4x8b
振蕩器型： 內部
工作溫度： 0°C ~ 70°C
封裝/外殼： 8-SOIC（0.209"，5.30mm 寬）
包裝： 管件
配用： XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208
AC164312-ND - MODULE SKT FOR PM3 16SOIC
ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1048-ND - ADAPTER 8-SOIC TO 8-DIP
309-1047-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
其它名稱： PIC12C672-10/SMR
PIC12C672-10/SMR-ND
1999 Microchip Technology Inc.
DS30561B-page 51
PIC12C67X
8.5
A/D Operation During Sleep
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS<1:0> = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES Register. If the
A/D interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
8.6
A/D Accuracy/Error
The overall accuracy of the A/D is less than
± 1 LSb for
VDD = 5V
± 10% and the analog VREF = VDD. This over-
all accuracy includes offset error, full scale error, and
integral error. The A/D converter is monotonic over the
full VDD range. The resolution and accuracy may be
less when either the analog reference (VDD) is less than
5.0V or when the analog reference (VREF) is less than
VDD.
The maximum pin leakage current is specified in the
Device Data Sheet electrical specification, parameter
#D060.
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, TAD should be derived from the device oscil-
lator. TAD must not violate the minimum and should be
≤8 s for preferred operation. This is because TAD,
when derived from TOSC, is kept away from on-chip
phase clock transitions. This reduces, to a large extent,
the effects of digital switching noise. This is not possible
with the RC derived clock. The loss of accuracy due to
digital switching noise can be significant if many I/O
pins are active.
In systems where the device will enter SLEEP mode
after the start of the A/D conversion, the RC clock
source selection is required. In this mode, the digital
noise from the modules in SLEEP are stopped. This
method gives high accuracy.
Note:
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS<1:0> = 11). To perform an A/D
conversion in SLEEP, the GO/DONE bit
must be set, followed by the SLEEP
instruction.
8.7
Effects of a Reset
A device reset forces all registers to their reset state.
This forces the A/D module to be turned off, and any
conversion is aborted. The value that is in the ADRES
register is not modified for a Reset. The ADRES regis-
ter will contain unknown data after a Power-on Reset.
8.8
Connection Considerations
If the input voltage exceeds the rail values (VSS or VDD)
by greater than 0.2V, then the accuracy of the conver-
sion is out of specification.
An external RC filter is sometimes added for anti-
aliasing of the input signal. The R component should be
selected to ensure that the total source impedance is
kept under the 10 k
recommended specification. Any
external components connected (via hi-impedance) to
an analog input pin (capacitor, zener diode, etc.) should
have very little leakage current at the pin.
8.9
Transfer Function
The ideal transfer function of the A/D converter is as fol-
lows: the first transition occurs when the analog input
voltage (VAIN) is 1 LSb (or Analog VREF / 256)
FIGURE 8-3:
A/D TRANSFER FUNCTION
Note:
For the PIC12C67X, care must be taken
when using the GP4 pin in A/D conversions
due to its proximity to the OSC1 pin.
Digit
al
code
out
put
FFh
FEh
04h
03h
02h
01h
00h
0.
5
LS
b
1
LSb
2
LSb
3
LSb
4
LSb
255
LS
b
256
LS
b
(f
ull
sc
al
e)
Analog input voltage
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