label ] INCF f,d O" />
參數(shù)資料
型號(hào)： PIC12C509A-04I/P
廠商： Microchip Technology
文件頁(yè)數(shù)： 63/113頁(yè)
文件大小： 0K
描述： IC MCU OTP 1KX12 8DIP
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 60
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 1.5KB（1K x 12）
程序存儲(chǔ)器類(lèi)型： OTP
RAM 容量： 41 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-DIP（0.300"，7.62mm）
包裝： 管件
配用： ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
DVMCPA-ND - KIT DVR BOARD EVAL SYSTEM MXDEV1
DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS40139E-page 53
PIC12C5XX
INCF
Increment f
Syntax:
[
label ]
INCF f,d
Operands:
0
≤ f ≤ 31
d
∈ [0,1]
Operation:
(f) + 1
→ (dest)
Status Affected:
Z
Encoding:
0010
10df
ffff
Description:
The contents of register ’f’ are incre-
mented. If ’d’ is 0 the result is placed in
the W register. If ’d’ is 1 the result is
placed back in register ’f’.
Words:
1
Cycles:
1
Example:
INCF
CNT,
1
Before Instruction
CNT
=
0xFF
Z=
0
After Instruction
CNT
=
0x00
Z=
1
INCFSZ
Increment f, Skip if 0
Syntax:
[
label ]
INCFSZ f,d
Operands:
0
≤ f ≤ 31
d
∈ [0,1]
Operation:
(f) + 1
→ (dest), skip if result = 0
Status Affected:
None
Encoding:
0011
11df
ffff
Description:
The contents of register ’f’ are incre-
mented. If ’d’ is 0 the result is placed in
the W register. If ’d’ is 1 the result is
placed back in register ’f’.
If the result is 0, then the next instruc-
tion, which is already fetched, is dis-
carded and an NOP is executed
instead making it a two cycle instruc-
tion.
Words:
1
Cycles:
1(2)
Example:
HERE
INCFSZ
CNT,
1
GOTO
LOOP
CONTINUE
Before Instruction
PC
=
address (HERE)
After Instruction
CNT
=
CNT + 1;
if CNT
=
0,
PC
=
address (CONTINUE);
if CNT
≠
0,
PC
=
address (HERE +1)
IORLW
Inclusive OR literal with W
Syntax:
[
label ]
IORLW k
Operands:
0
≤ k ≤ 255
Operation:
(W) .OR. (k)
→ (W)
Status Affected:
Z
Encoding:
1101
kkkk
Description:
The contents of the W register are
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
Words:
1
Cycles:
1
Example:
IORLW
0x35
Before Instruction
W
=
0x9A
After Instruction
W=
0xBF
Z=
0
IORWF
Inclusive OR W with f
Syntax:
[
label ]
IORWF
f,d
Operands:
0
≤ f ≤ 31
d
∈ [0,1]
Operation:
(W).OR. (f)
→ (dest)
Status Affected:
Z
Encoding:
0001
00df
ffff
Description:
Inclusive OR the W register with regis-
ter 'f'. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
Words:
1
Cycles:
1
Example:
IORWF
RESULT, 0
Before Instruction
RESULT =
0x13
W
=
0x91
After Instruction
RESULT =
0x13
W
=
0x93
Z=
0
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