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參數(shù)資料
| 型號(hào)： | PI2EQX4401DZFEX |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI-E REPEATER/EQUALZR 36TQFN |
| 標(biāo)準(zhǔn)包裝： | 3,500 |
| 系列： | * |
3
PS8872H
09/26/08
PI2EQX4401D
2.5Gbps x1 Lane Serial PCI-Express Repeater/Equalizer
with Clock Buffer & Signal Defect Feature
Pin Description
Pin #
Pin Name
I/O
Description
1, 6, 10, 23, 28
VDD
PWR
1.8V Supply Voltage
2
AI+
I
Positive CML Input Channel A with internal 50Ω pull down during normal
operation (EN_A=1). When EN_A=0, this pin is high-impedance.
3
AI-
I
Negative CML Input Channel A with internal 50Ω pull down during normal
operation (EN_A=1). When EN_A=0, this pin is high-impedance.
4, 9, 20, 25
GND
PWR
Supply Ground
22
BI+
I
Positive CML Input Channel B with internal 50Ω pull down during normal
operation (EN_B=1). When EN_B=0, this pin is high-impedance.
21
BI-
I
Negative CML Input Channel B with internal 50Ω pull down during normal
operation (EN_B=1). When EN_B=0, this pin is high-impedance.
34, 33
SEL[0:1]_A
I
Selection pins for equalizer (see Amplier Conguration Table)
w/ 50KΩ internal pull up
13, 14
SEL[0:1]_B
I
32
SEL[2]_A
I
Selection pins for amplier (see Amplier Conguration Table)
w/ 50KΩ internal pull up
15
SEL[2]_B
I
31
SEL[3]_A
I
Selection pins for De-Emphasis (See De-Emphasis Conguration Table)
w/ 50KΩ internal pull up
16
SEL[3]_B
I
27
AO+
O
Positive CML Output Channel A internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
26
AO-
O
Negative CML Output Channel A with internal 50Ω pull up during normal
operation and 2KΩ pull up otherwise.
7
BO+
O
Positive CML Output Channel B with internal 50Ω pull up during normal
operation and 2KΩ pull up otherwise.
8
BO-
O
Negative CMLOutput Channel B with internal 50Ω pull up during normal
operation and 2KΩ pull up otherwise.
30, 29
EN_[A,B]
I
EN_[A:B] is the enable pin. A LVCMOS high provides normal operation. A
LVCMOS low selects a low power down mode.
12
CLKIN-
I
Differential Input Reference Clock. If clock buffer is not used, then both
CLKIN+, CLKIN- should be pulled high to VDD.
11
CLKIN+
I
17, 18
OUT+, OUT-
O
Differential Reference Clock Output
5
AVDD
PWR
1.8V Analog supply voltage
24
AGND
PWR
Analog ground
19
IREF
O
External 475Ω resistor connection to set the differential output current. If the
clock buffer is not used, then IREF should be unconnected (open).
36, 35
SIG_A, SIG_B
O
SIG Detector output for channel A-B. Provides a LVCMOS high output when
an input signal greater than the threshold is detected
08-0241
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI2EQX4401ZFE | 功能描述:時(shí)鐘緩沖器 2.5Gbps Quad Serial PCI EX RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| PI2EQX4401ZFEX | 功能描述:時(shí)鐘緩沖器 2.5Gbps Quad Serial PCI EX RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| PI2EQX4402 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer |
| PI2EQX4402D | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2.5 Gbps x2 Lane Serial PCI Express Repeater/Equalizer with Signal Detect feature |
| PI2EQX4402DNBE | 功能描述:緩沖器和線路驅(qū)動(dòng)器 2.5Gbps2-lane Redrvr w/ Signal Detect RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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