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參數(shù)資料
| 型號： | PHD3055L |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | PowerMOS transistor Logic level FET |
| 中文描述： | 12 A, 60 V, 0.18 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC PACKAGE-3 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 55K |
| 代理商： | PHD3055L |
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
PHD3055L
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Fig.14. Typical switching times
t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS
/V
(BR)DSS 25 C
= f(T
j
)
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
Fig.17. Normalised unclamped inductive energy.
E
AS
% = f(T
j
)
Fig.18. Unclamped inductive test circuit.
E
AS
=
0.5
LI
D
0
5
Qg, Gate charge (nC)
10
15
0
2
4
6
8
10
PHP3055L
VGS, Gate-Source voltage (Volts)
VDS = 30 V
48 V
ID = 10 A
Tj = 25 C
0
0.5
1
1.5
0
5
10
15
20
PHP3055L
VSDS, Source-drain voltage (Volts)
IF, Source-drain diode current (Amps)
Tj = 25 C
Tj = 175 C
VGS = 0 V
0
20
40
60
80
100
1
10
100
1000
td(off)
td(on)
tf
PHP3055L
RG, Gate resistance (Ohms)
Switching times (ns)
tr
Tj = 25 C
VDD = 30 V
VGS = 5 V
RD = 2.7 Ohms
ID = 10 A
20
40
60
80
Starting Tj ( C)
100
120
140
160
180
120
110
100
90
80
70
60
50
40
30
20
10
0
EAS, Normalised unclamped inductive energy (%)
-100
-50
0
50
100
150
0.85
0.9
0.95
1
1.05
1.1
1.15
Tj, Junction temperature (C)
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
L
T.U.T.
VDD
RGS
R 01
shunt
VDS
-ID/100
+
-
VGS
0
2
V
(
BR
)
DSS
/(
V
(
BR
)
DSS
V
DD
)
September 1997
5
Rev 1.000
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