參數(shù)資料
型號(hào)： PGA309AIPWT
英文描述： Voltage Output PROGRAMMABLE SENSOR CONDITIONER
中文描述： 電壓輸出可編程傳感器空調(diào)
文件頁數(shù)： 6/20頁
文件大小： 298K
代理商： PGA309AIPWT
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SBOS292A DECEMBER 2003 REVISED AUGUST 2004
www.ti.com
6
ELECTRICAL CHARACTERISTICS (continued)
BOLDFACE
limits apply over the specified temperature range:
T
A
= 40
°
C to +125
°
C
TA = +25
°
C, VSA = VSD = +5V (VSA = VSUPPLY ANALOG, VSD = VSUPPLY DIGITAL; VSA must equal VSD), GNDD = GNDA = 0, and VREF = REFIN/REFOUT = +5V,
unless otherwise noted.
PGA309
PARAMETER
UNITS
MAX
TYP
MIN
CONDITIONS
TEMPERATURE ADC (CONTINUED)
Temp ADC Ext. REF (VREFT = VREF, VEXC, or VSA)
Full-Scale Input Voltage
Differential Input Impedance
Common-Mode Input Impedance
Register 6, Bit D8 = 0
(+Input) (Input)
±
VREFT/GPGA
2.4/GPGA
8
8
8
8
11
13
14
15
0.01
2.5
1.25
0.7
0.3
1.5
1.0
0.7
0.6
0.2
2
80
100
85
V
M
M
M
M
M
G
PGA
= 1
G
PGA
= 2
G
PGA
= 4
G
PGA
= 8
Resolution
R1, R0 = ‘00’, ADC2X = ‘0’, Conversion Time = 6ms
R1, R0 = ‘01’, ADC2X = ‘0’, Conversion Time = 24ms
R1, R0 = ‘10’, ADC2X = ‘0’, Conversion Time = 50ms
R1, R0 = ‘11’, ADC2X = ‘0’, Conversion Time = 100ms
Bits + Sign
Bits + Sign
Bits + Sign
Bits + Sign
%
mV
mV
mV
mV
μ
V/
°
C
μ
V/
°
C
μ
V/
°
C
μ
V/
°
C
%
ppm/
°
C
ppm/V
dB
dB
Integral Nonlinearity
Offset Error
G
PGA
= 1
G
PGA
= 2
G
PGA
= 4
G
PGA
= 8
G
PGA
= 1
G
PGA
= 2
G
PGA
= 4
G
PGA
= 8
Offset Drift
Gain Error
Gain Error Drift
Gain vs VSA
Common-Mode Rejection
At DC and
G
PGA
= 8
At DC and
G
PGA
= 1
Register 6, Bit D11 = 1
External Temperature Current Excitation
Current Excitation
Temperature Drift
Voltage Compliance
ITEMP
5.8
7
5
8
μ
A
nA/
°
C
V
VSA1.2
LINEARIZATION ADJUST AND EXCITATION VOLTAGE (VEXC)
Range 0
Linearization DAC Range
Linearization DAC Resolution
VEXC Gain
Gain Error Drift
Range 1
Linearization DAC Range
Linearization DAC Resolution
VEXC Gain
Gain Error Drift
VEXC Range Upper Limit
IEXC SHORT
DIGITAL INTERFACE
Two-Wire Compatible
One-Wire
Maximum Lookup Table Size(6)
Two-Wire Data Rate
Register 3, Bit D11 = 0
With Respect to VFB
±
127 Steps, 7-Bit + Sign
With Respect to VREF
0.166 to +0.166
1.307
0.83
25
V/V
mV/V
V/V
ppm/
°
C
Register 3, Bit D11 = 1
With Respect to VFB
±
127 Steps, 7-Bit + Sign
With Respect to VREF
0.124 to +0.124
0.9764
0.52
25
VSA 0.5
50
V/V
mV/V
V/V
ppm/
°
C
V
mA
IEXC = 5mA
Short-Circuit VEXC Output Current
Bus Speed
1
400
38.4K
kHz
Bits/s
Bits
kHz
Serial Speed Baud Rate
4.8K
17 x 3 x 16
65
PGA309 to EEPROM (SCL frequency)
LOGIC LEVELS
Input Levels (SDA, SCL, PRG, TEST)
(SDA, SCL, PRG, TEST)
(SDA, SCL)
Pull-Up Current Source (SDA, SCL)
Pull-Down Current Source (TEST)
Output LOW Level (SDA, SCL, PRG)
Low
High
0.2
VSD
V
V
V
μ
A
μ
A
V
0.7
VSD
Hysteresis
0.1
VSD
85
25
55
15
125
40
0.4
Open Drain, ISINK = 5mA
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