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參數(shù)資料
| 型號： | PDSP1601AB0AC |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | ALU and Barrel Shifter |
| 中文描述： | ALU和桶式移位器 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 142K |
| 代理商： | PDSP1601AB0AC |
PDSP1601 MC
2
Symbol
MSB
MSS
B15 - B0
CEB
CLK
MSA0 - MSA1
A15 - A0
CEA
MSC
IS0 - IS3
SV0 - SV3
SVOE
RS0, RS1
RS2
C0 - C15
OE
BFP
CO
RA0 - RA2
CI
IA0 - IA3
IA4
Vcc
GND
Description
ALU B-input multiplexer select control.
1
This input is latched internally on the rising edge
of CLK.
Shifter Input multiplexer select control.
1
This input is latched internally on the rising edge
of CLK.
B Port data Input.
Data presented to this port is latched into the input register on the rising
edge of CLK. B15 is the MSB.
Clock enable, B Port input register.
When low the clock to this register is enabled.
Common clock to all internal registered elements.
All registers are loaded, and outputs
change on the rising edge of CLK.
ALU A-input multiplexer select control.
1
This input are latched internally on the rising edge
of CLK.
A Port data Input.
Data presented to this port is latched into the input register on the rising
edge of CLK. B15 is the MSB.
Clock enable, A Port input register.
When low the clock to this register is enabled.
C-Port multiplexer select control.1
This input is latched internally on the rising edge
of CLK.
Instruction inputs to Barrel Shifter, IS3 = MSB.
1
This input is latched internally on the
rising edge of CLK.
Shift Value I/O Port.
This port is used as an input when shift values are supplied form
external sources, and as an output when Normalise operations are invoked. The I/O functions
are determined by the IS0 - IS3 instruction inputs, and by the
SVOE
control.
The shift value is latched internally on the rising edge of CLK.
SV Output enable.
When high the SV port can only operate as an input. When low the SV
port can act as an input or as an output, according to the IS0 - IS3 instruction. This pin should
be tied high or low, depending upon the application.
Instruction inputs to Barrel Shifter registers.
1
These input are latched internally on the
rising edge of CLK.
C Port data output.
Data output on this port is selected by the C output multiplexer.
C15 is the MSB
Output enable.
The C Port outputs are in high impedance condition when this control is high
Block Floating Point Flag
from ALU, active high.
Carry out
from MSB of ALU
Instruction inputs to ALU registsers.
1
These inputs are latched interally on the rising
edge of CLK.
Carry in
to LSB of ALU
Instruction inputs to ALU.
1
IA4 = MSB. These inputs are latched internally on the rising
edge of CLK.
+5V supply:
Both Vcc pins must be connected.
0V supply:
Both GND pins must be connected.
PIN DESCRIPTIONS
16
17
18 - 25
30 - 37
38
39
41 - 42
43 - 50
55 - 62
63
64
65 - 68
69 - 72
73
74 - 75
81
82 - 98
99
100
6
7 - 9
10
11 - 14
80, 5
90 & 40
Pin No.
(GG100
Package)
NOTES
1. All instructions are executed in the cycle commencing with the rising edge of the CLK which latches the inputs.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PDSP1601ABOAC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:ALU and Barrel Shifter |
| PDSP1601AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601AC0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
| PDSP1601ALC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601B0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
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