CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
User’s Manual U16228EJ2V0UD
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(3) Pulse width measurement with free-running counter and two capture registers
When 16-bit timer counter 0n (TM0n) is operated in free-running mode, it is possible to measure the pulse width
of the signal input to the TI00n pin.
When the rising or falling edge specified by bits 4 and 5 (ES0n0 and ES0n1) of prescaler mode register 0n
(PRM0n) is input to the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register 01n
(CR01n) and an interrupt request signal (INTTM01n) is set.
Also, when the inverse edge to that of the capture operation is input into CR01n, the value of TM0n is taken into
16-bit timer capture/compare register 00n (CR00n).
Sampling is performed using the count clock cycle selected by prescaler mode register 0n (PRM0n), and a
capture operation is only performed when a valid level of the TI00n pin is detected twice, thus eliminating noise
with a short pulse width.
Figure 6-27. Control Register Settings for Pulse Width Measurement with Free-Running Counter and
Two Capture Registers (with Rising Edge Specified)
(a) 16-bit timer mode control register 0n (TMC0n)
7
6
5
4
TMC0n3
TMC0n2
0
0
0
0
0
1
TMC0n1
0/1
OVF0n
0
TMC0n
Free-running mode
(b) Capture/compare control register 0n (CRC0n)
7
0
6
0
5
0
4
0
3
0
CRC0n2
1
CRC0n1
1
CRC0n0
1
CRC0n
CR00n used as capture register
Captures to CR00n at inverse edge
to valid edge of TI00n.
CR01n used as capture register
(c) Prescaler mode register 0n (PRM0n)
ES1n1
0/1
ES1n0
0/1
ES0n1
0
ES0n0
1
3
0
2
0
PRM0n1
0/1
PRM0n0
0/1
PRM0n
Selects count clock (setting “11” is prohibited).
Specifies rising edge for pulse width detection.
Setting invalid (setting “10” is prohibited.)
Remark
0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
See the description of the respective control registers for details.
n = 0:
μ
PD780131, 780132
n = 0, 1:
μ
PD780133, 780134, 78F0134, 780136, 780138, 78F0138