![](http://datasheet.mmic.net.cn/370000/PD78F0138M3GK-A--9ET_datasheet_16728522/PD78F0138M3GK-A--9ET_355.png)
CHAPTER 16 MULTIPLIER/DIVIDER
User’s Manual U16228EJ2V0UD
355
16.3 Register Controlling Multiplier/Divider
The multiplier/divider is controlled by multiplier/divider control register 0 (DMUC0).
(1) Multiplier/divider control register 0 (DMUC0)
DMUC0 is an 8-bit register that controls the operation of the multiplier/divider.
This register can be read by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 16-5. Format of Multiplier/Divider Control Register 0 (DMUC0)
Address: FF68H After reset: 00H R/W
DMUE
DMUC0
0
0
0
0
0
0
DMUSEL0
Stops operation
Starts operation
DMUE
Note
0
1
Operation start/stop
Division mode
Multiplication mode
DMUSEL0
0
1
Operation mode (multiplication/division) selection
Symbol
4
3
2
1
0
6
<7>
5
Note
When DMUE is set to 1, the operation is started. DMUE is automatically cleared to 0 after the operation is
complete.
Cautions 1. If DMUE is cleared to 0 during operation processing (when DMUE is 1), the operation result
is not guaranteed. If the operation is completed while the clearing instruction is being
executed, the operation result is guaranteed, provided that the interrupt flag is set.
2. Do not change the value of DMUSEL0 during operation processing (while DMUE is 1). If it is
changed, undefined operation results are stored in multiplication/division data register A0
(MDA0) and remainder data register 0 (SDR0).
3. If DMUE is cleared to 0 during operation processing (while DMUE is 1), the operation
processing is stopped. To execute the operation again, set multiplication/division data
register A0 (MDA0), multiplication/division data register B0 (MDB0), and multiplier/divider
control register 0 (DMUC0), and start the operation (by clearing DMUE to 1).