參數(shù)資料
型號(hào): PCF8574T
廠商: NXP Semiconductors N.V.
元件分類: I2C/I2S
英文描述: Remote 8-bit I-O expander for I2C-bus
封裝: PCF8574AP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;PCF8574AT/3<SOT162-1 (SO16)|<<http://www.nxp.com/packages/SOT162-1.html<1<wee
文件頁(yè)數(shù): 15/24頁(yè)
文件大小: 132K
代理商: PCF8574T
2002 Nov 22
15
Philips Semiconductors
Product specification
Remote 8-bit I/O expander for I
2
C-bus
PCF8574
Note
1.
The Power-on reset circuit resets the I
2
C-bus logic at V
DD
< V
POR
and sets all I/Os to logic 1 (with current source to
V
DD
).
I/Os
V
IL
V
IH
I
IHL(max)
LOW level input voltage
HIGH level input voltage
maximum allowed input
current through protection
diode
LOW level output current
HIGH level output current
transient pull-up current
0.5
0.7V
DD
+0.3V
DD
V
DD
+ 0.5
±
400
V
V
μ
A
V
I
V
DD
or V
I
V
SS
I
OL
I
OH
I
OHt
V
OL
= 1 V; V
DD
= 5 V
V
OH
= V
SS
HIGH during acknowledge
(see Fig.15); V
OH
= V
SS
;
V
DD
= 2.5 V
10
30
25
1
300
mA
μ
A
mA
C
i
C
o
Port timing; C
L
100 pF
(see Figs 11 and 12)
input capacitance
output capacitance
10
10
pF
pF
t
pv
t
su
t
h
Interrupt INT
(see Fig.14)
output data valid
input data set-up time
input data hold time
0
4
4
μ
s
μ
s
μ
s
I
OL
I
L
T
IMING
; C
L
100 pF
t
iv
t
ir
Select inputs A0 to A2
LOW level output current
leakage current
V
OL
= 0.4 V
V
I
= V
DD
or V
SS
1.6
1
+1
mA
μ
A
input data valid time
reset delay time
4
4
μ
s
μ
s
V
IL
V
IH
I
LI
LOW level input voltage
HIGH level input voltage
input leakage current
0.5
0.7V
DD
250
+0.3V
DD
V
DD
+ 0.5
+250
V
V
nA
pin at V
DD
or V
SS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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