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| 型號(hào)： | PCF5083 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | STEEL COVER |
| 中文描述： | GSM信號(hào)處理IC |
| 文件頁(yè)數(shù)： | 26/136頁(yè) |
| 文件大?。?/td> | 602K |
| 代理商： | PCF5083 |
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1996 Oct 29
26
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
8.3.2.3
Timing Generation
To generate all burst types required to fulfil the GSM timing, it is necessary to combine and/or modify the basic receive
and transmit burst sequences. For this purpose two registers MODE0_REG and MODE1_REG exist, containing some
flags to control the burst timing. Both mode registers and the registers RXSTART_REG, TXSTART_REG and
MONSTART_REG have an additional pipeline stage.The first register stage can be read or written by the SC.
The second stage is used for timing generation. The pipelining operation is performed at QBC = 0 (together with the
frame interrupt generation). Some flags inside the mode registers have a third pipelining stage to allow the generation of
a MON burst which overlaps into the next frame. The System Controller must set up the registers within the frame before
the programmed timing becomes active. Which register MODE0_REG or MODE1_REG is actually used is described in
Table 11. MODE0_REG and MODE1_REG contain identical flags.
Table 11
Mode Registers (MODE0_REG and MODE1_REG)
Table 12
Register selection for the MON burst
BIT
FLAG
DESCRIPTION
13
USEMODE
MODE_REGx select.
If USERMODE = 0; then switch to MODE_REG0 after the next
frame. If USERMODE = 1; then switch to MODE_REG1 after the next frame.
Disable frame interrupt.
If DISFRAMENT = 1; then the frame interrupt is disabled.
RX calibration timing.
If RXCAL = 1; then the RX calibration timing is generated.
Register select.
The state of this bit determines which registers are used for the TX
burst. If TXLENGTH = 0; then registers TXBURST0_REG and TXKEY0_REG are
used. If TXLENGTH = 1; then registers TXBURST1_REG and TXKEY1_REG are
used.
RXBURSTx_REG select.
The state of these two bits determine which RXBURST
register is used for the MON burst; see Table 12.
12
11
10
DISFRAMENT
RXCAL
TXLENGTH
9
8
7
6
5
4
3
MONLENGTH1
MONLENGTH0
RXLENGTH1
RXLENGTH0
DTX
SEND
RECON
RXBURSTx_REG select.
The state of these two bits determine which RXBURST
register is used for the Rx burst; see Table 13.
DTX timing enable.
If DTX = 1; then DTX timing is enabled.
TX burst timing.
If SEND = 1; the TX burst timing is generated.
Receiver start-up.
If RECON = 1, the receiver start-up sequence for the MON burst
in the idle frame is generated.
MON burst timing.
If RECMON = 1; the MON burst timing is generated.
Third level measurement.
If RECTX = 1; then the MON burst timing during the TX
timeslot for a third level measurements generated.
Rx burst timing.
If RECRX = 1; the Rx burst timing is generated.
2
1
RECMON
RECTX
0
RECRX
MONLENGTH1
MONLENGTH0
REGISTER SELECTED
0
0
1
1
0
1
0
1
RXBURST0_REG is used.
RXBURST1_REG is used.
RXBURST2_REG is used.
Undefined during a MON burst.
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