參數(shù)資料
型號: PCA9675DK
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
中文描述: 18 I/O, PIA-GENERAL PURPOSE, PDSO24
封裝: 3.90 MM, 0.635 MM PITCH, PLASTIC, MO-137, SOT556-1, SSOP-24
文件頁數(shù): 17/34頁
文件大?。?/td> 185K
代理商: PCA9675DK
PCA9675_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 February 2007
17 of 34
NXP Semiconductors
PCA9675
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt
9.
Characteristics of the I
2
C-bus
The I
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
9.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Figure 20
).
9.1.1
START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
Figure 21
.)
9.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Figure 22
).
Fig 20. Bit transfer
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 21. Definition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
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